[llvm-commits] [llvm] r44658 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/shift-combine.ll

[Chris Lattner]

Author: lattner
Date: Thu Dec  6 01:47:55 2007
New Revision: 44658

URL: http://llvm.org/viewvc/llvm-project?rev=44658&view=rev
Log:
third time around: instead of disabling this completely,
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/shift-combine.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=44658&r1=44657&r2=44658&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Dec  6 01:47:55 2007
@@ -2134,12 +2134,6 @@
 /// visitShiftByConstant - Handle transforms common to the three shifts, when
 /// the shift amount is a constant.
 SDOperand DAGCombiner::visitShiftByConstant(SDNode *N, unsigned Amt) {
-  // FIXME: disable this for now.  This pessimizes some common cases like:
-  //
-  //void foo(int *X, int i) { X[i & 1235] = 1; }
-  //int bar(int *X, int i) { return X[i & 255]; }
-  return SDOperand();
-  
   SDNode *LHS = N->getOperand(0).Val;
   if (!LHS->hasOneUse()) return SDOperand();
   
@@ -2169,6 +2163,19 @@
   ConstantSDNode *BinOpCst = dyn_cast<ConstantSDNode>(LHS->getOperand(1));
   if (!BinOpCst) return SDOperand();
   
+  
+  // FIXME: disable this for unless the input to the binop is a shift by a
+  // constant.  If it is not a shift, it pessimizes some common cases like:
+  //
+  //void foo(int *X, int i) { X[i & 1235] = 1; }
+  //int bar(int *X, int i) { return X[i & 255]; }
+  SDNode *BinOpLHSVal = LHS->getOperand(0).Val;
+  if ((BinOpLHSVal->getOpcode() != ISD::SHL && 
+       BinOpLHSVal->getOpcode() != ISD::SRA &&
+       BinOpLHSVal->getOpcode() != ISD::SRL) ||
+      !isa<ConstantSDNode>(BinOpLHSVal->getOperand(1)))
+    return SDOperand();
+  
   MVT::ValueType VT = N->getValueType(0);
   
   // If this is a signed shift right, and the high bit is modified

Modified: llvm/trunk/test/CodeGen/X86/shift-combine.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-combine.ll?rev=44658&r1=44657&r2=44658&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-combine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-combine.ll Thu Dec  6 01:47:55 2007
@@ -1,5 +1,4 @@
 ; RUN: llvm-as < %s | llc | not grep shrl
-; XFAIL: *
 
 target datalayout = 
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i686-apple-darwin8"


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