Author: djg
Date: Thu Aug 2 16:21:54 2007
New Revision: 40757
URL: http://llvm.org/viewvc/llvm-project?rev=40757&view=rev
Log:
More explicit keywords.
Modified:
llvm/trunk/lib/CodeGen/BranchFolding.cpp
llvm/trunk/lib/CodeGen/VirtRegMap.h
llvm/trunk/lib/Target/ARM/ARMISelLowering.h
llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h
llvm/trunk/lib/Target/IA64/IA64ISelLowering.h
llvm/trunk/lib/Target/Mips/MipsISelLowering.h
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
llvm/trunk/lib/Target/X86/X86ISelLowering.h
Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=40757&r1=40756&r2=40757&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Thu Aug 2 16:21:54 2007
@@ -46,7 +46,7 @@
struct BranchFolder : public MachineFunctionPass {
static char ID;
- BranchFolder(bool defaultEnableTailMerge) :
+ explicit BranchFolder(bool defaultEnableTailMerge) :
MachineFunctionPass((intptr_t)&ID) {
switch (FlagEnableTailMerge) {
case cl::BOU_UNSET: EnableTailMerge = defaultEnableTailMerge; break;
Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.h?rev=40757&r1=40756&r2=40757&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.h (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.h Thu Aug 2 16:21:54 2007
@@ -75,7 +75,7 @@
void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
public:
- VirtRegMap(MachineFunction &mf);
+ explicit VirtRegMap(MachineFunction &mf);
void grow();
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=40757&r1=40756&r2=40757&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Thu Aug 2 16:21:54 2007
@@ -76,7 +76,7 @@
class ARMTargetLowering : public TargetLowering {
int VarArgsFrameIndex; // FrameIndex for start of varargs area.
public:
- ARMTargetLowering(TargetMachine &TM);
+ explicit ARMTargetLowering(TargetMachine &TM);
virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
virtual const char *getTargetNodeName(unsigned Opcode) const;
Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h?rev=40757&r1=40756&r2=40757&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h Thu Aug 2 16:21:54 2007
@@ -64,7 +64,7 @@
int VarArgsBase; // What is the base FrameIndex
bool useITOF;
public:
- AlphaTargetLowering(TargetMachine &TM);
+ explicit AlphaTargetLowering(TargetMachine &TM);
/// LowerOperation - Provide custom lowering hooks for some operations.
///
Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.h?rev=40757&r1=40756&r2=40757&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelLowering.h (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.h Thu Aug 2 16:21:54 2007
@@ -43,7 +43,7 @@
unsigned GP, SP, RP; // FIXME - clean this mess up
public:
- IA64TargetLowering(TargetMachine &TM);
+ explicit IA64TargetLowering(TargetMachine &TM);
unsigned VirtGPR; // this is public so it can be accessed in the selector
// for ISD::RET. add an accessor instead? FIXME
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=40757&r1=40756&r2=40757&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Thu Aug 2 16:21:54 2007
@@ -53,7 +53,7 @@
// const MipsSubtarget &MipsSubTarget;
public:
- MipsTargetLowering(MipsTargetMachine &TM);
+ explicit MipsTargetLowering(MipsTargetMachine &TM);
/// LowerOperation - Provide custom lowering hooks for some operations.
virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=40757&r1=40756&r2=40757&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Thu Aug 2 16:21:54 2007
@@ -186,7 +186,7 @@
int ReturnAddrIndex; // FrameIndex for return slot.
const PPCSubtarget &PPCSubTarget;
public:
- PPCTargetLowering(PPCTargetMachine &TM);
+ explicit PPCTargetLowering(PPCTargetMachine &TM);
/// getTargetNodeName() - This method returns the name of a target specific
/// DAG node.
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=40757&r1=40756&r2=40757&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Thu Aug 2 16:21:54 2007
@@ -286,7 +286,7 @@
int BytesToPopOnReturn; // Number of arg bytes ret should pop.
int BytesCallerReserves; // Number of arg bytes caller makes.
public:
- X86TargetLowering(TargetMachine &TM);
+ explicit X86TargetLowering(TargetMachine &TM);
// Return the number of bytes that a function should pop when it returns
(in
// addition to the space used by the return address).
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