Author: evancheng
Date: Tue Jul 31 19:12:08 2007
New Revision: 40658
URL: http://llvm.org/viewvc/llvm-project?rev=40658&view=rev
Log:
Indexed loads each has 2 outputs.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=40658&r1=40657&r2=40658&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Jul 31 19:12:08 2007
@@ -745,34 +745,34 @@
[]>, Requires<[IsARM, HasV5T]>;
// Indexed loads
-def LDR_PRE : AI2pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode2:$addr),
+def LDR_PRE : AI2pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode2:$addr),
"ldr", " $dst, $addr!", "$addr.base = $base_wb", []>;
-def LDR_POST : AI2po<(outs GPR:$dst), (ins GPR:$base_wb, GPR:$base,
am2offset:$offset),
+def LDR_POST : AI2po<(outs GPR:$dst, GPR:$base_wb), (ins GPR:$base,
am2offset:$offset),
"ldr", " $dst, [$base], $offset", "$base = $base_wb", []>;
-def LDRH_PRE : AI3pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode3:$addr),
+def LDRH_PRE : AI3pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode3:$addr),
"ldr", "h $dst, $addr!", "$addr.base = $base_wb", []>;
-def LDRH_POST : AI3po<(outs GPR:$dst), (ins GPR:$base_wb,
GPR:$base,am3offset:$offset),
+def LDRH_POST : AI3po<(outs GPR:$dst, GPR:$base_wb), (ins
GPR:$base,am3offset:$offset),
"ldr", "h $dst, [$base], $offset", "$base = $base_wb",
[]>;
-def LDRB_PRE : AI2pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode2:$addr),
+def LDRB_PRE : AI2pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode2:$addr),
"ldr", "b $dst, $addr!", "$addr.base = $base_wb", []>;
-def LDRB_POST : AI2po<(outs GPR:$dst), (ins GPR:$base_wb,
GPR:$base,am2offset:$offset),
+def LDRB_POST : AI2po<(outs GPR:$dst, GPR:$base_wb), (ins
GPR:$base,am2offset:$offset),
"ldr", "b $dst, [$base], $offset", "$base = $base_wb",
[]>;
-def LDRSH_PRE : AI3pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode3:$addr),
+def LDRSH_PRE : AI3pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode3:$addr),
"ldr", "sh $dst, $addr!", "$addr.base = $base_wb", []>;
-def LDRSH_POST: AI3po<(outs GPR:$dst), (ins GPR:$base_wb,
GPR:$base,am3offset:$offset),
+def LDRSH_POST: AI3po<(outs GPR:$dst, GPR:$base_wb), (ins
GPR:$base,am3offset:$offset),
"ldr", "sh $dst, [$base], $offset", "$base = $base_wb",
[]>;
-def LDRSB_PRE : AI3pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode3:$addr),
+def LDRSB_PRE : AI3pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode3:$addr),
"ldr", "sb $dst, $addr!", "$addr.base = $base_wb", []>;
-def LDRSB_POST: AI3po<(outs GPR:$dst), (ins GPR:$base_wb,
GPR:$base,am3offset:$offset),
+def LDRSB_POST: AI3po<(outs GPR:$dst, GPR:$base_wb), (ins
GPR:$base,am3offset:$offset),
"ldr", "sb $dst, [$base], $offset", "$base = $base_wb",
[]>;
} // isLoad
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