Author: void Date: Tue Jul 3 20:29:22 2007 New Revision: 37866 URL: http://llvm.org/viewvc/llvm-project?rev=37866&view=rev Log: Support generation of GR64 to MMX code in the JIT.
Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=37866&r1=37865&r2=37866&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Tue Jul 3 20:29:22 2007 @@ -25,6 +25,8 @@ // MMXIS - MMX instructions with XS prefix. class MMXI<bits<8> o, Format F, dag ops, string asm, list<dag> pattern> : I<o, F, ops, asm, pattern>, TB, Requires<[HasMMX]>; +class MMXRI<bits<8> o, Format F, dag ops, string asm, list<dag> pattern> + : I<o, F, ops, asm, pattern>, TB, REX_W, Requires<[HasMMX]>; class MMX2I<bits<8> o, Format F, dag ops, string asm, list<dag> pattern> : I<o, F, ops, asm, pattern>, TB, OpSize, Requires<[HasMMX]>; class MMXIi8<bits<8> o, Format F, dag ops, string asm, list<dag> pattern> @@ -183,8 +185,8 @@ def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src), "movd {$src, $dst|$dst, $src}", []>; -def MMX_MOVD64to64rr : MMXI<0x6E, MRMSrcReg, (ops VR64:$dst, GR64:$src), - "movd {$src, $dst|$dst, $src}", []>; +def MMX_MOVD64to64rr : MMXRI<0x6E, MRMSrcReg, (ops VR64:$dst, GR64:$src), + "movd {$src, $dst|$dst, $src}", []>; def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src), "movq {$src, $dst|$dst, $src}", []>; _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits