Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.193 -> 1.194
---
Log message:
Add new TargetLowering code to provide the final register type that an
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.
Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.
---
Diffs of the changes: (+1 -1)
SelectionDAGNodes.h | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.193
llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.194
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.193 Mon Jun 25 11:23:39 2007
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jun 28 18:29:44 2007
@@ -253,7 +253,7 @@
/// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
/// vector type with the same length and element type, this produces a
/// concatenated vector result value, with length equal to the sum of the
- /// input vectors.
+ /// lengths of the input vectors.
CONCAT_VECTORS,
/// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
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