Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.230 -> 1.231
PPCISelLowering.cpp updated: 1.274 -> 1.275
PPCISelLowering.h updated: 1.65 -> 1.66
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
---
Diffs of the changes: (+8 -6)
PPCISelDAGToDAG.cpp | 4 ++--
PPCISelLowering.cpp | 9 +++++----
PPCISelLowering.h | 1 +
3 files changed, 8 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.230
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.231
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.230 Mon Apr 2 00:59:42 2007
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Fri Jun 22 09:59:07 2007
@@ -424,8 +424,8 @@
SDOperand Op1 = N->getOperand(1);
uint64_t LKZ, LKO, RKZ, RKO;
- TLI.ComputeMaskedBits(Op0, 0xFFFFFFFFULL, LKZ, LKO);
- TLI.ComputeMaskedBits(Op1, 0xFFFFFFFFULL, RKZ, RKO);
+ CurDAG->ComputeMaskedBits(Op0, 0xFFFFFFFFULL, LKZ, LKO);
+ CurDAG->ComputeMaskedBits(Op1, 0xFFFFFFFFULL, RKZ, RKO);
unsigned TargetMask = LKZ;
unsigned InsertMask = RKZ;
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.274
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.275
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.274 Tue Jun 19 00:46:06 2007
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Fri Jun 22 09:59:07 2007
@@ -688,10 +688,10 @@
// disjoint.
uint64_t LHSKnownZero, LHSKnownOne;
uint64_t RHSKnownZero, RHSKnownOne;
- ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne);
+ DAG.ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne);
if (LHSKnownZero) {
- ComputeMaskedBits(N.getOperand(1), ~0U, RHSKnownZero, RHSKnownOne);
+ DAG.ComputeMaskedBits(N.getOperand(1), ~0U, RHSKnownZero, RHSKnownOne);
// If all of the bits are known zero on the LHS or RHS, the add won't
// carry.
if ((LHSKnownZero | RHSKnownZero) == ~0U) {
@@ -742,7 +742,7 @@
// (for better address arithmetic) if the LHS and RHS of the OR are
// provably disjoint.
uint64_t LHSKnownZero, LHSKnownOne;
- ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne);
+ DAG.ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne);
if ((LHSKnownZero|~(unsigned)imm) == ~0U) {
// If all of the bits are known zero on the LHS or RHS, the add won't
// carry.
@@ -850,7 +850,7 @@
// (for better address arithmetic) if the LHS and RHS of the OR are
// provably disjoint.
uint64_t LHSKnownZero, LHSKnownOne;
- ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne);
+ DAG.ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne);
if ((LHSKnownZero|~(unsigned)imm) == ~0U) {
// If all of the bits are known zero on the LHS or RHS, the add won't
// carry.
@@ -3235,6 +3235,7 @@
uint64_t Mask,
uint64_t &KnownZero,
uint64_t &KnownOne,
+ const SelectionDAG &DAG,
unsigned Depth) const {
KnownZero = 0;
KnownOne = 0;
Index: llvm/lib/Target/PowerPC/PPCISelLowering.h
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.65
llvm/lib/Target/PowerPC/PPCISelLowering.h:1.66
--- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.65 Tue Apr 3 08:59:52 2007
+++ llvm/lib/Target/PowerPC/PPCISelLowering.h Fri Jun 22 09:59:07 2007
@@ -230,6 +230,7 @@
uint64_t Mask,
uint64_t &KnownZero,
uint64_t &KnownOne,
+ const SelectionDAG &DAG,
unsigned Depth = 0) const;
virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
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