[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.411 -> 1.412
---
Log message:

Look for VECTOR_SHUFFLE that's identity operation on either LHS or RHS. This 
can happen before DAGCombiner catches it.

---
Diffs of the changes:  (+19 -2)

 X86ISelLowering.cpp |   21 +++++++++++++++++++--
 1 files changed, 19 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.411 
llvm/lib/Target/X86/X86ISelLowering.cpp:1.412
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.411       Sat Jun 16 18:57:15 2007
+++ llvm/lib/Target/X86/X86ISelLowering.cpp     Mon Jun 18 19:02:56 2007
@@ -1954,6 +1954,16 @@
   return HasHi;
 }
 
+/// isIdentityMask - Return true if the specified VECTOR_SHUFFLE operand
+/// specifies a identity operation on the LHS or RHS.
+static bool isIdentityMask(SDNode *N, bool RHS = false) {
+  unsigned NumElems = N->getNumOperands();
+  for (unsigned i = 0; i < NumElems; ++i)
+    if (!isUndefOrEqual(N->getOperand(i), i + (RHS ? NumElems : 0)))
+      return false;
+  return true;
+}
+
 /// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies
 /// a splat of a single element.
 static bool isSplatMask(SDNode *N) {
@@ -2630,6 +2640,11 @@
   if (isZeroShuffle(Op.Val))
     return getZeroVector(VT, DAG);
 
+  if (isIdentityMask(PermMask.Val))
+    return V1;
+  else if (isIdentityMask(PermMask.Val, true))
+    return V2;
+
   if (isSplatMask(PermMask.Val)) {
     if (NumElems <= 4) return Op;
     // Promote it to a v4i32 splat.
@@ -4316,12 +4331,14 @@
   // Only do shuffles on 128-bit vector types for now.
   if (MVT::getSizeInBits(VT) == 64) return false;
   return (Mask.Val->getNumOperands() <= 4 ||
+          isIdentityMask(Mask.Val) ||
+          isIdentityMask(Mask.Val, true) ||
           isSplatMask(Mask.Val)  ||
           isPSHUFHW_PSHUFLWMask(Mask.Val) ||
           X86::isUNPCKLMask(Mask.Val) ||
+          X86::isUNPCKHMask(Mask.Val) ||
           X86::isUNPCKL_v_undef_Mask(Mask.Val) ||
-          X86::isUNPCKH_v_undef_Mask(Mask.Val) ||
-          X86::isUNPCKHMask(Mask.Val));
+          X86::isUNPCKH_v_undef_Mask(Mask.Val));
 }
 
 bool X86TargetLowering::isVectorClearMaskLegal(std::vector<SDOperand> &BVOps,



_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits