Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.124 -> 1.125 --- Log message: Add missing const qualifiers. --- Diffs of the changes: (+7 -5) TargetInstrInfo.h | 12 +++++++----- 1 files changed, 7 insertions(+), 5 deletions(-) Index: llvm/include/llvm/Target/TargetInstrInfo.h diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.124 llvm/include/llvm/Target/TargetInstrInfo.h:1.125 --- llvm/include/llvm/Target/TargetInstrInfo.h:1.124 Wed May 23 02:19:12 2007 +++ llvm/include/llvm/Target/TargetInstrInfo.h Tue May 29 13:30:54 2007 @@ -395,19 +395,21 @@ /// isPredicable - Returns true if the instruction is already predicated. /// - virtual bool isPredicated(MachineInstr *MI) const { + virtual bool isPredicated(const MachineInstr *MI) const { return false; } /// PredicateInstruction - Convert the instruction into a predicated /// instruction. It returns true if the operation was successful. - virtual bool PredicateInstruction(MachineInstr *MI, - std::vector<MachineOperand> &Pred) const; + virtual + bool PredicateInstruction(MachineInstr *MI, + const std::vector<MachineOperand> &Pred) const; /// SubsumesPredicate - Returns true if the first specified predicated /// subsumes the second, e.g. GE subsumes GT. - virtual bool SubsumesPredicate(std::vector<MachineOperand> &Pred1, - std::vector<MachineOperand> &Pred2) const { + virtual + bool SubsumesPredicate(const std::vector<MachineOperand> &Pred1, + const std::vector<MachineOperand> &Pred2) const { return false; } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits