Hello all, While doing some experiments with vector ValueTypes, I noticed that the PowerPC target uses MVT::LAST_VECTOR_VALUETYPE inconsistently with the way it is declared. I don't have the resources to test PowerPC changes, so I'm just sending this patch to the list in case anyone who does is interested in it.
Dan Index: lib/Target/PowerPC/PPCISelLowering.cpp =================================================================== RCS file: /var/cvs/llvm/llvm/lib/Target/PowerPC/PPCISelLowering.cpp,v retrieving revision 1.270 diff -u -r1.270 PPCISelLowering.cpp --- lib/Target/PowerPC/PPCISelLowering.cpp +++ lib/Target/PowerPC/PPCISelLowering.cpp @@ -222,7 +222,7 @@ // First set operation action for all vector types to expand. Then we // will selectively turn on ones that can be effectively codegen'd. for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; - VT != (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) { + VT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) { // add/sub are legal for all supported vector VT's. setOperationAction(ISD::ADD , (MVT::ValueType)VT, Legal); setOperationAction(ISD::SUB , (MVT::ValueType)VT, Legal); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits