Changes in directory llvm/lib/CodeGen:
MachOWriter.h updated: 1.2 -> 1.3
README.txt updated: 1.3 -> 1.4
---
Log message:
Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.
---
Diffs of the changes: (+24 -24)
MachOWriter.h | 10 +++++-----
README.txt | 38 +++++++++++++++++++-------------------
2 files changed, 24 insertions(+), 24 deletions(-)
Index: llvm/lib/CodeGen/MachOWriter.h
diff -u llvm/lib/CodeGen/MachOWriter.h:1.2 llvm/lib/CodeGen/MachOWriter.h:1.3
--- llvm/lib/CodeGen/MachOWriter.h:1.2 Wed Feb 28 01:40:50 2007
+++ llvm/lib/CodeGen/MachOWriter.h Mon Apr 16 13:10:22 2007
@@ -254,19 +254,19 @@
// The following constants are getting pulled in by one of the
// system headers, which creates a neat clash with the enum.
#if !defined(VM_PROT_NONE)
-#define VM_PROT_NONE 0x00
+#define VM_PROT_NONE 0x00
#endif
#if !defined(VM_PROT_READ)
-#define VM_PROT_READ 0x01
+#define VM_PROT_READ 0x01
#endif
#if !defined(VM_PROT_WRITE)
-#define VM_PROT_WRITE 0x02
+#define VM_PROT_WRITE 0x02
#endif
#if !defined(VM_PROT_EXECUTE)
-#define VM_PROT_EXECUTE 0x04
+#define VM_PROT_EXECUTE 0x04
#endif
#if !defined(VM_PROT_ALL)
-#define VM_PROT_ALL 0x07
+#define VM_PROT_ALL 0x07
#endif
// Constants for the vm protection fields
Index: llvm/lib/CodeGen/README.txt
diff -u llvm/lib/CodeGen/README.txt:1.3 llvm/lib/CodeGen/README.txt:1.4
--- llvm/lib/CodeGen/README.txt:1.3 Wed Mar 28 21:48:56 2007
+++ llvm/lib/CodeGen/README.txt Mon Apr 16 13:10:22 2007
@@ -2,29 +2,29 @@
Common register allocation / spilling problem:
- mul lr, r4, lr
- str lr, [sp, #+52]
- ldr lr, [r1, #+32]
- sxth r3, r3
- ldr r4, [sp, #+52]
- mla r4, r3, lr, r4
+ mul lr, r4, lr
+ str lr, [sp, #+52]
+ ldr lr, [r1, #+32]
+ sxth r3, r3
+ ldr r4, [sp, #+52]
+ mla r4, r3, lr, r4
can be:
- mul lr, r4, lr
+ mul lr, r4, lr
mov r4, lr
- str lr, [sp, #+52]
- ldr lr, [r1, #+32]
- sxth r3, r3
- mla r4, r3, lr, r4
+ str lr, [sp, #+52]
+ ldr lr, [r1, #+32]
+ sxth r3, r3
+ mla r4, r3, lr, r4
and then "merge" mul and mov:
- mul r4, r4, lr
- str lr, [sp, #+52]
- ldr lr, [r1, #+32]
- sxth r3, r3
- mla r4, r3, lr, r4
+ mul r4, r4, lr
+ str lr, [sp, #+52]
+ ldr lr, [r1, #+32]
+ sxth r3, r3
+ mla r4, r3, lr, r4
It also increase the likelyhood the store may become dead.
@@ -70,13 +70,13 @@
bb27 ...
...
- %reg1037 = ADDri %reg1039, 1
- %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
+ %reg1037 = ADDri %reg1039, 1
+ %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
Successors according to CFG: 0x8b03bf0 (#5)
bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
- %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037,
mbb<bb27,0x8b0a7c0>
+ %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037,
mbb<bb27,0x8b0a7c0>
Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
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