[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/ARM:

ARMISelDAGToDAG.cpp updated: 1.107 -> 1.108
---
Log message:

AM2 can match 2^n +/- 1. e.g.  ldr r3, [r2, r2, lsl #2]

---
Diffs of the changes:  (+23 -0)

 ARMISelDAGToDAG.cpp |   23 +++++++++++++++++++++++
 1 files changed, 23 insertions(+)


Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.107 
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.108
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.107       Wed Feb  7 15:18:32 2007
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp     Tue Mar 13 16:05:54 2007
@@ -102,6 +102,29 @@
 bool ARMDAGToDAGISel::SelectAddrMode2(SDOperand Op, SDOperand N,
                                       SDOperand &Base, SDOperand &Offset,
                                       SDOperand &Opc) {
+  if (N.getOpcode() == ISD::MUL) {
+    if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
+      // X * [3,5,9] -> X + X * [2,4,8] etc.
+      int RHSC = (int)RHS->getValue();
+      if (RHSC & 1) {
+        RHSC = RHSC & ~1;
+        ARM_AM::AddrOpc AddSub = ARM_AM::add;
+        if (RHSC < 0) {
+          AddSub = ARM_AM::sub;
+          RHSC = - RHSC;
+        }
+        if (isPowerOf2_32(RHSC)) {
+          unsigned ShAmt = Log2_32(RHSC);
+          Base = Offset = N.getOperand(0);
+          Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt,
+                                                            ARM_AM::lsl),
+                                          MVT::i32);
+          return true;
+        }
+      }
+    }
+  }
+
   if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB) {
     Base = N;
     if (N.getOpcode() == ISD::FrameIndex) {



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