If there is no objection, I'm committing this in.
Nicolas Geoffray wrote:
> This patch implements the frameaddress intrinsincs for PPC.
>
> OK to commit?
> ------------------------------------------------------------------------
>
> Index: PPCISelLowering.h
> ===================================================================
> RCS file: /var/cvs/llvm/llvm/lib/Target/PowerPC/PPCISelLowering.h,v
> retrieving revision 1.60
> diff -t -d -u -p -5 -r1.60 PPCISelLowering.h
> --- PPCISelLowering.h 27 Feb 2007 13:01:19 -0000 1.60
> +++ PPCISelLowering.h 27 Feb 2007 17:32:38 -0000
> @@ -238,9 +238,11 @@ namespace llvm {
>
> /// isLegalAddressImmediate - Return true if the integer value can be
> used
> /// as the offset of the target addressing mode.
> virtual bool isLegalAddressImmediate(int64_t V) const;
> virtual bool isLegalAddressImmediate(llvm::GlobalValue*) const;
> +
> + SDOperand LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG);
> };
> }
>
> #endif // LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H
> Index: PPCISelLowering.cpp
> ===================================================================
> RCS file: /var/cvs/llvm/llvm/lib/Target/PowerPC/PPCISelLowering.cpp,v
> retrieving revision 1.258
> diff -t -d -u -p -5 -r1.258 PPCISelLowering.cpp
> --- PPCISelLowering.cpp 27 Feb 2007 13:01:19 -0000 1.258
> +++ PPCISelLowering.cpp 27 Feb 2007 17:32:44 -0000
> @@ -2698,11 +2698,11 @@ SDOperand PPCTargetLowering::LowerOperat
> case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG);
> case ISD::MUL: return LowerMUL(Op, DAG);
>
> // Frame & Return address. Currently unimplemented
> case ISD::RETURNADDR: break;
> - case ISD::FRAMEADDR: break;
> + case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
> }
> return SDOperand();
> }
>
>
> //===----------------------------------------------------------------------===//
> @@ -3169,5 +3169,27 @@ bool PPCTargetLowering::isLegalAddressIm
> }
>
> bool PPCTargetLowering::isLegalAddressImmediate(llvm::GlobalValue* GV) const
> {
> return TargetLowering::isLegalAddressImmediate(GV);
> }
> +
> +SDOperand PPCTargetLowering::LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG)
> +{
> + // Depths > 0 not supported yet!
> + if (cast<ConstantSDNode>(Op.getOperand(0))->getValue() > 0)
> + return SDOperand();
> +
> + MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
> + bool isPPC64 = PtrVT == MVT::i64;
> +
> + MachineFunction &MF = DAG.getMachineFunction();
> + MachineFrameInfo *MFI = MF.getFrameInfo();
> + bool is31 = (NoFramePointerElim || MFI->hasVarSizedObjects())
> + && MFI->getStackSize();
> +
> + if (isPPC64)
> + return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::X31 : PPC::X1,
> + MVT::i32);
> + else
> + return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::R31 : PPC::R1,
> + MVT::i32);
> +}
>
> ------------------------------------------------------------------------
>
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