Changes in directory llvm/lib/CodeGen:
RegisterScavenging.cpp updated: 1.4 -> 1.5 --- Log message: RegScavenger interface change to make it more flexible. --- Diffs of the changes: (+18 -16) RegisterScavenging.cpp | 34 ++++++++++++++++++---------------- 1 files changed, 18 insertions(+), 16 deletions(-) Index: llvm/lib/CodeGen/RegisterScavenging.cpp diff -u llvm/lib/CodeGen/RegisterScavenging.cpp:1.4 llvm/lib/CodeGen/RegisterScavenging.cpp:1.5 --- llvm/lib/CodeGen/RegisterScavenging.cpp:1.4 Mon Feb 26 19:58:04 2007 +++ llvm/lib/CodeGen/RegisterScavenging.cpp Tue Feb 27 15:09:48 2007 @@ -25,12 +25,12 @@ #include "llvm/ADT/STLExtras.h" using namespace llvm; -RegScavenger::RegScavenger(MachineBasicBlock *mbb) - : MBB(mbb), MBBIInited(false) { +void RegScavenger::init() { const MachineFunction &MF = *MBB->getParent(); const TargetMachine &TM = MF.getTarget(); const MRegisterInfo *RegInfo = TM.getRegisterInfo(); + MBBI = MBB->begin(); NumPhysRegs = RegInfo->getNumRegs(); RegStates.resize(NumPhysRegs, true); @@ -50,15 +50,16 @@ for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(), E = MBB->livein_end(); I != E; ++I) setUsed(*I); + + Initialized = true; } void RegScavenger::forward() { assert(MBBI != MBB->end() && "Already at the end of the basic block!"); // Move ptr forward. - if (!MBBIInited) { - MBBI = MBB->begin(); - MBBIInited = true; - } else + if (!Initialized) + init(); + else MBBI = next(MBBI); MachineInstr *MI = MBBI; @@ -133,16 +134,6 @@ setUsed(ChangedRegs); } -void RegScavenger::forward(MachineBasicBlock::iterator I) { - while (MBBI != I) - forward(); -} - -void RegScavenger::backward(MachineBasicBlock::iterator I) { - while (MBBI != I) - backward(); -} - /// CreateRegClassMask - Set the bits that represent the registers in the /// TargetRegisterClass. static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) { @@ -167,3 +158,14 @@ int Reg = RegStatesCopy.find_first(); return (Reg == -1) ? 0 : Reg; } + +void RegScavenger::clear() { + if (MBB) { + MBBI = MBB->end(); + MBB = NULL; + } + + NumPhysRegs = 0; + Initialized = false; + RegStates.clear(); +} _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits