[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCInstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.256 -> 1.257
PPCInstrInfo.td updated: 1.274 -> 1.275
---
Log message:

always lower to RETFLAG, never leave it as just ret.


---
Diffs of the changes:  (+7 -11)

 PPCISelLowering.cpp |   15 +++++++--------
 PPCInstrInfo.td     |    3 ---
 2 files changed, 7 insertions(+), 11 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.256 
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.257
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.256   Sun Feb 25 14:01:40 2007
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Mon Feb 26 13:44:02 2007
@@ -1626,13 +1626,13 @@
 }
 
 static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) {
-  SDOperand Copy;
+  SDOperand Chain = Op.getOperand(0);
   switch(Op.getNumOperands()) {
   default:
     assert(0 && "Do not know how to return this many arguments!");
     abort();
   case 1: 
-    return SDOperand(); // ret void is legal
+    return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Chain);
   case 3: {
     MVT::ValueType ArgVT = Op.getOperand(1).getValueType();
     unsigned ArgReg;
@@ -1647,8 +1647,7 @@
       ArgReg = PPC::F1;
     }
     
-    Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1),
-                            SDOperand());
+    Chain = DAG.getCopyToReg(Chain, ArgReg, Op.getOperand(1), SDOperand());
     
     // If we haven't noted the R3/F1 are live out, do so now.
     if (DAG.getMachineFunction().liveout_empty())
@@ -1656,9 +1655,9 @@
     break;
   }
   case 5:
-    Copy = DAG.getCopyToReg(Op.getOperand(0), PPC::R3, Op.getOperand(3), 
-                            SDOperand());
-    Copy = DAG.getCopyToReg(Copy, PPC::R4, Op.getOperand(1),Copy.getValue(1));
+    Chain = DAG.getCopyToReg(Chain, PPC::R3, Op.getOperand(3), SDOperand());
+    Chain = DAG.getCopyToReg(Chain, PPC::R4, Op.getOperand(1),
+                             Chain.getValue(1));
     // If we haven't noted the R3+R4 are live out, do so now.
     if (DAG.getMachineFunction().liveout_empty()) {
       DAG.getMachineFunction().addLiveOut(PPC::R3);
@@ -1666,7 +1665,7 @@
     }
     break;
   }
-  return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1));
+  return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Chain, Chain.getValue(1));
 }
 
 static SDOperand LowerSTACKRESTORE(SDOperand Op, SelectionDAG &DAG,


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.274 
llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.275
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.274       Sun Feb 25 13:20:53 2007
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td     Mon Feb 26 13:44:02 2007
@@ -1080,9 +1080,6 @@
 def : Pat<(sub  immSExt16:$imm, GPRC:$in),
           (SUBFIC GPRC:$in, imm:$imm)>;
 
-// Return void support.
-def : Pat<(ret), (BLR)>;
-
 // SHL/SRL
 def : Pat<(shl GPRC:$in, (i32 imm:$imm)),
           (RLWINM GPRC:$in, imm:$imm, 0, (SHL32 imm:$imm))>;



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