Changes in directory llvm/lib/Target/IA64:
IA64RegisterInfo.cpp updated: 1.32 -> 1.33 --- Log message: By default, spills kills the register being stored. --- Diffs of the changes: (+6 -5) IA64RegisterInfo.cpp | 11 ++++++----- 1 files changed, 6 insertions(+), 5 deletions(-) Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.32 llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.33 --- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.32 Wed Feb 21 16:54:50 2007 +++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp Thu Feb 22 19:10:03 2007 @@ -42,17 +42,18 @@ const TargetRegisterClass *RC) const{ if (RC == IA64::FPRegisterClass) { - BuildMI(MBB, MI, TII.get(IA64::STF_SPILL)).addFrameIndex(FrameIdx).addReg(SrcReg); + BuildMI(MBB, MI, TII.get(IA64::STF_SPILL)).addFrameIndex(FrameIdx) + .addReg(SrcReg, false, false, true); } else if (RC == IA64::GRRegisterClass) { - BuildMI(MBB, MI, TII.get(IA64::ST8)).addFrameIndex(FrameIdx).addReg(SrcReg); - } - else if (RC == IA64::PRRegisterClass) { + BuildMI(MBB, MI, TII.get(IA64::ST8)).addFrameIndex(FrameIdx) + .addReg(SrcReg, false, false, true); + } else if (RC == IA64::PRRegisterClass) { /* we use IA64::r2 as a temporary register for doing this hackery. */ // first we load 0: BuildMI(MBB, MI, TII.get(IA64::MOV), IA64::r2).addReg(IA64::r0); // then conditionally add 1: BuildMI(MBB, MI, TII.get(IA64::CADDIMM22), IA64::r2).addReg(IA64::r2) - .addImm(1).addReg(SrcReg); + .addImm(1).addReg(SrcReg, false, false, true); // and then store it to the stack BuildMI(MBB, MI, TII.get(IA64::ST8)).addFrameIndex(FrameIdx).addReg(IA64::r2); } else assert(0 && _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits