Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.204 -> 1.205
LiveVariables.cpp updated: 1.64 -> 1.65
---
Log message:
Allow any MachineBasicBlock (not just the entry block) to have live-in physical
registers. Make sure liveinterval analysis is correctly creating live ranges
for them.
---
Diffs of the changes: (+41 -47)
LiveIntervalAnalysis.cpp | 72 +++++++++++++++++++++--------------------------
LiveVariables.cpp | 16 +++++-----
2 files changed, 41 insertions(+), 47 deletions(-)
Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.204
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.205
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.204 Tue Dec 19 16:41:21 2006
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Feb 12 19:30:55 2007
@@ -88,28 +88,6 @@
allocatableRegs_ = mri_->getAllocatableSet(fn);
r2rMap_.grow(mf_->getSSARegMap()->getLastVirtReg());
- // If this function has any live ins, insert a dummy instruction at the
- // beginning of the function that we will pretend "defines" the values. This
- // is to make the interval analysis simpler by providing a number.
- if (fn.livein_begin() != fn.livein_end()) {
- unsigned FirstLiveIn = fn.livein_begin()->first;
-
- // Find a reg class that contains this live in.
- const TargetRegisterClass *RC = 0;
- for (MRegisterInfo::regclass_iterator RCI = mri_->regclass_begin(),
- E = mri_->regclass_end(); RCI != E; ++RCI)
- if ((*RCI)->contains(FirstLiveIn)) {
- RC = *RCI;
- break;
- }
-
- MachineInstr *OldFirstMI = fn.begin()->begin();
- mri_->copyRegToReg(*fn.begin(), fn.begin()->begin(),
- FirstLiveIn, FirstLiveIn, RC);
- assert(OldFirstMI != fn.begin()->begin() &&
- "copyRetToReg didn't insert anything!");
- }
-
// Number MachineInstrs and MachineBasicBlocks.
// Initialize MBB indexes to a sentinal.
MBB2IdxMap.resize(mf_->getNumBlockIDs(), ~0U);
@@ -119,6 +97,28 @@
MBB != E; ++MBB) {
// Set the MBB2IdxMap entry for this MBB.
MBB2IdxMap[MBB->getNumber()] = MIIndex;
+
+ // If this BB has any live ins, insert a dummy instruction at the
+ // beginning of the function that we will pretend "defines" the values.
This
+ // is to make the interval analysis simpler by providing a number.
+ if (MBB->livein_begin() != MBB->livein_end()) {
+ unsigned FirstLiveIn = *MBB->livein_begin();
+
+ // Find a reg class that contains this live in.
+ const TargetRegisterClass *RC = 0;
+ for (MRegisterInfo::regclass_iterator RCI = mri_->regclass_begin(),
+ RCE = mri_->regclass_end(); RCI != RCE; ++RCI)
+ if ((*RCI)->contains(FirstLiveIn)) {
+ RC = *RCI;
+ break;
+ }
+
+ MachineInstr *OldFirstMI = MBB->begin();
+ mri_->copyRegToReg(*MBB, MBB->begin(),
+ FirstLiveIn, FirstLiveIn, RC);
+ assert(OldFirstMI != MBB->begin() &&
+ "copyRetToReg didn't insert anything!");
+ }
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) {
@@ -129,19 +129,6 @@
}
}
- // Note intervals due to live-in values.
- if (fn.livein_begin() != fn.livein_end()) {
- MachineBasicBlock *Entry = fn.begin();
- for (MachineFunction::livein_iterator I = fn.livein_begin(),
- E = fn.livein_end(); I != E; ++I) {
- handlePhysicalRegisterDef(Entry, Entry->begin(), 0,
- getOrCreateInterval(I->first), 0);
- for (const unsigned* AS = mri_->getAliasSet(I->first); *AS; ++AS)
- handlePhysicalRegisterDef(Entry, Entry->begin(), 0,
- getOrCreateInterval(*AS), 0);
- }
- }
-
computeIntervals();
numIntervals += getNumIntervals();
@@ -691,8 +678,6 @@
DOUT << "********** COMPUTING LIVE INTERVALS **********\n"
<< "********** Function: "
<< ((Value*)mf_->getFunction())->getName() << '\n';
- bool IgnoreFirstInstr = mf_->livein_begin() != mf_->livein_end();
-
// Track the index of the current machine instr.
unsigned MIIndex = 0;
for (MachineFunction::iterator MBBI = mf_->begin(), E = mf_->end();
@@ -701,9 +686,18 @@
DOUT << ((Value*)MBB->getBasicBlock())->getName() << ":\n";
MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end();
- if (IgnoreFirstInstr) {
+
+ if (MBB->livein_begin() != MBB->livein_end()) {
+ // Process live-ins to this BB first.
+ for (MachineBasicBlock::livein_iterator LI = MBB->livein_begin(),
+ LE = MBB->livein_end(); LI != LE; ++LI) {
+ handlePhysicalRegisterDef(MBB, MBB->begin(), MIIndex,
+ getOrCreateInterval(*LI), 0);
+ for (const unsigned* AS = mri_->getAliasSet(*LI); *AS; ++AS)
+ handlePhysicalRegisterDef(MBB, MBB->begin(), MIIndex,
+ getOrCreateInterval(*AS), 0);
+ }
++MI;
- IgnoreFirstInstr = false;
MIIndex += InstrSlots::NUM;
}
Index: llvm/lib/CodeGen/LiveVariables.cpp
diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.64
llvm/lib/CodeGen/LiveVariables.cpp:1.65
--- llvm/lib/CodeGen/LiveVariables.cpp:1.64 Thu Dec 7 14:28:15 2006
+++ llvm/lib/CodeGen/LiveVariables.cpp Mon Feb 12 19:30:55 2007
@@ -254,14 +254,6 @@
/// Get some space for a respectable number of registers...
VirtRegInfo.resize(64);
- // Mark live-in registers as live-in.
- for (MachineFunction::livein_iterator I = MF.livein_begin(),
- E = MF.livein_end(); I != E; ++I) {
- assert(MRegisterInfo::isPhysicalRegister(I->first) &&
- "Cannot have a live-in virtual register!");
- HandlePhysRegDef(I->first, 0);
- }
-
analyzePHINodes(MF);
// Calculate live variable information in depth first order on the CFG of the
@@ -275,6 +267,14 @@
E = df_ext_end(Entry, Visited); DFI != E; ++DFI) {
MachineBasicBlock *MBB = *DFI;
+ // Mark live-in registers as live-in.
+ for (MachineBasicBlock::livein_iterator II = MBB->livein_begin(),
+ EE = MBB->livein_end(); II != EE; ++II) {
+ assert(MRegisterInfo::isPhysicalRegister(*II) &&
+ "Cannot have a live-in virtual register!");
+ HandlePhysRegDef(*II, 0);
+ }
+
// Loop over all of the instructions, processing them.
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) {
_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
