Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.56 -> 1.57
---
Log message:
eliminateFrameIndex() bug when frame pointer is used as base register.
---
Diffs of the changes: (+27 -23)
ARMRegisterInfo.cpp | 50 +++++++++++++++++++++++++++-----------------------
1 files changed, 27 insertions(+), 23 deletions(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.56
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.57
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.56 Fri Feb 2 17:08:40 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Mon Feb 5 18:23:31 2007
@@ -386,6 +386,8 @@
const MachineInstrBuilder MIB = BuildMI(MBB, MBBI, TII.get(Opc), DestReg);
if (DestReg == ARM::SP)
MIB.addReg(BaseReg).addReg(LdReg);
+ else if (isSub)
+ MIB.addReg(BaseReg).addReg(LdReg);
else
MIB.addReg(LdReg).addReg(BaseReg);
if (DestReg == ARM::SP)
@@ -647,7 +649,7 @@
// MI would expand into a large number of instructions. Don't try to
// simplify the immediate.
if (NumMIs > 2) {
- emitThumbRegPlusImmediate(MBB, II, DestReg, ARM::SP, Offset, TII);
+ emitThumbRegPlusImmediate(MBB, II, DestReg, FrameReg, Offset, TII);
MBB.erase(II);
return;
}
@@ -705,7 +707,7 @@
case ARMII::AddrModeTs: {
ImmIdx = i+1;
InstrOffs = MI.getOperand(ImmIdx).getImm();
- NumBits = 8;
+ NumBits = (FrameReg == ARM::SP) ? 8 : 5;
Scale = 4;
break;
}
@@ -722,31 +724,33 @@
isSub = true;
}
- MachineOperand &ImmOp = MI.getOperand(ImmIdx);
- int ImmedOffset = Offset / Scale;
- unsigned Mask = (1 << NumBits) - 1;
- if ((unsigned)Offset <= Mask * Scale) {
- // Replace the FrameIndex with sp
- MI.getOperand(i).ChangeToRegister(FrameReg, false);
+ if (!isSub || !isThumb) {
+ MachineOperand &ImmOp = MI.getOperand(ImmIdx);
+ int ImmedOffset = Offset / Scale;
+ unsigned Mask = (1 << NumBits) - 1;
+ if ((unsigned)Offset <= Mask * Scale) {
+ // Replace the FrameIndex with sp
+ MI.getOperand(i).ChangeToRegister(FrameReg, false);
+ if (isSub)
+ ImmedOffset |= 1 << NumBits;
+ ImmOp.ChangeToImmediate(ImmedOffset);
+ return;
+ }
+
+ // Otherwise, it didn't fit. Pull in what we can to simplify the immed.
+ if (AddrMode == ARMII::AddrModeTs) {
+ // Thumb tLDRspi, tSTRspi. These will change to instructions that use
+ // a different base register.
+ NumBits = 5;
+ Mask = (1 << NumBits) - 1;
+ }
+
+ ImmedOffset = ImmedOffset & Mask;
if (isSub)
ImmedOffset |= 1 << NumBits;
ImmOp.ChangeToImmediate(ImmedOffset);
- return;
+ Offset &= ~(Mask*Scale);
}
-
- // Otherwise, it didn't fit. Pull in what we can to simplify the immediate.
- if (AddrMode == ARMII::AddrModeTs) {
- // Thumb tLDRspi, tSTRspi. These will change to instructions that use a
- // different base register.
- NumBits = 5;
- Mask = (1 << NumBits) - 1;
- }
-
- ImmedOffset = ImmedOffset & Mask;
- if (isSub)
- ImmedOffset |= 1 << NumBits;
- ImmOp.ChangeToImmediate(ImmedOffset);
- Offset &= ~(Mask*Scale);
}
// If we get here, the immediate doesn't fit into the instruction. We folded
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