Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.354 -> 1.355 --- Log message: Changes to support making the shift instructions be true BinaryOperators. This feature is needed in order to support shifts of more than 255 bits on large integer types. This changes the syntax for llvm assembly to make shl, ashr and lshr instructions look like a binary operator: shl i32 %X, 1 instead of shl i32 %X, i8 1 Additionally, this should help a few passes perform additional optimizations. --- Diffs of the changes: (+4 -1) SelectionDAGISel.cpp | 5 ++++- 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.354 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.355 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.354 Wed Jan 31 22:55:59 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Feb 1 20:16:22 2007 @@ -1420,7 +1420,10 @@ SDOperand Op1 = getValue(I.getOperand(0)); SDOperand Op2 = getValue(I.getOperand(1)); - Op2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Op2); + if (TLI.getShiftAmountTy() < Op2.getValueType()) + Op2 = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), Op2); + else if (TLI.getShiftAmountTy() > Op2.getValueType()) + Op2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Op2); setValue(&I, DAG.getNode(Opcode, Op1.getValueType(), Op1, Op2)); } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
