Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.458 -> 1.459 SelectionDAGISel.cpp updated: 1.345 -> 1.346 --- Log message: Change the MachineDebugInfo to MachineModuleInfo to better reflect usage for debugging and exception handling. --- Diffs of the changes: (+24 -24) LegalizeDAG.cpp | 8 ++++---- SelectionDAGISel.cpp | 40 ++++++++++++++++++++-------------------- 2 files changed, 24 insertions(+), 24 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.458 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.459 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.458 Fri Jan 26 08:34:51 2007 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Jan 26 15:22:28 2007 @@ -735,16 +735,16 @@ case TargetLowering::Promote: default: assert(0 && "This action is not supported yet!"); case TargetLowering::Expand: { - MachineDebugInfo *DebugInfo = DAG.getMachineDebugInfo(); + MachineModuleInfo *MMI = DAG.getMachineModuleInfo(); bool useDEBUG_LOC = TLI.isOperationLegal(ISD::DEBUG_LOC, MVT::Other); bool useLABEL = TLI.isOperationLegal(ISD::LABEL, MVT::Other); - if (DebugInfo && (useDEBUG_LOC || useLABEL)) { + if (MMI && (useDEBUG_LOC || useLABEL)) { const std::string &FName = cast<StringSDNode>(Node->getOperand(3))->getValue(); const std::string &DirName = cast<StringSDNode>(Node->getOperand(4))->getValue(); - unsigned SrcFile = DebugInfo->RecordSource(DirName, FName); + unsigned SrcFile = MMI->RecordSource(DirName, FName); SmallVector<SDOperand, 8> Ops; Ops.push_back(Tmp1); // chain @@ -759,7 +759,7 @@ } else { unsigned Line = cast<ConstantSDNode>(LineOp)->getValue(); unsigned Col = cast<ConstantSDNode>(ColOp)->getValue(); - unsigned ID = DebugInfo->RecordLabel(Line, Col, SrcFile); + unsigned ID = MMI->RecordLabel(Line, Col, SrcFile); Ops.push_back(DAG.getConstant(ID, MVT::i32)); Result = DAG.getNode(ISD::LABEL, MVT::Other,&Ops[0],Ops.size()); } Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.345 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.346 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.345 Fri Jan 26 08:34:51 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jan 26 15:22:28 2007 @@ -24,7 +24,7 @@ #include "llvm/Instructions.h" #include "llvm/Intrinsics.h" #include "llvm/IntrinsicInst.h" -#include "llvm/CodeGen/MachineDebugInfo.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineJumpTableInfo.h" @@ -1954,16 +1954,16 @@ return 0; case Intrinsic::dbg_stoppoint: { - MachineDebugInfo *DebugInfo = DAG.getMachineDebugInfo(); + MachineModuleInfo *MMI = DAG.getMachineModuleInfo(); DbgStopPointInst &SPI = cast<DbgStopPointInst>(I); - if (DebugInfo && SPI.getContext() && DebugInfo->Verify(SPI.getContext())) { + if (MMI && SPI.getContext() && MMI->Verify(SPI.getContext())) { SDOperand Ops[5]; Ops[0] = getRoot(); Ops[1] = getValue(SPI.getLineValue()); Ops[2] = getValue(SPI.getColumnValue()); - DebugInfoDesc *DD = DebugInfo->getDescFor(SPI.getContext()); + DebugInfoDesc *DD = MMI->getDescFor(SPI.getContext()); assert(DD && "Not a debug information descriptor"); CompileUnitDesc *CompileUnit = cast<CompileUnitDesc>(DD); @@ -1976,10 +1976,10 @@ return 0; } case Intrinsic::dbg_region_start: { - MachineDebugInfo *DebugInfo = DAG.getMachineDebugInfo(); + MachineModuleInfo *MMI = DAG.getMachineModuleInfo(); DbgRegionStartInst &RSI = cast<DbgRegionStartInst>(I); - if (DebugInfo && RSI.getContext() && DebugInfo->Verify(RSI.getContext())) { - unsigned LabelID = DebugInfo->RecordRegionStart(RSI.getContext()); + if (MMI && RSI.getContext() && MMI->Verify(RSI.getContext())) { + unsigned LabelID = MMI->RecordRegionStart(RSI.getContext()); DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getRoot(), DAG.getConstant(LabelID, MVT::i32))); } @@ -1987,10 +1987,10 @@ return 0; } case Intrinsic::dbg_region_end: { - MachineDebugInfo *DebugInfo = DAG.getMachineDebugInfo(); + MachineModuleInfo *MMI = DAG.getMachineModuleInfo(); DbgRegionEndInst &REI = cast<DbgRegionEndInst>(I); - if (DebugInfo && REI.getContext() && DebugInfo->Verify(REI.getContext())) { - unsigned LabelID = DebugInfo->RecordRegionEnd(REI.getContext()); + if (MMI && REI.getContext() && MMI->Verify(REI.getContext())) { + unsigned LabelID = MMI->RecordRegionEnd(REI.getContext()); DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getRoot(), DAG.getConstant(LabelID, MVT::i32))); } @@ -1998,11 +1998,11 @@ return 0; } case Intrinsic::dbg_func_start: { - MachineDebugInfo *DebugInfo = DAG.getMachineDebugInfo(); + MachineModuleInfo *MMI = DAG.getMachineModuleInfo(); DbgFuncStartInst &FSI = cast<DbgFuncStartInst>(I); - if (DebugInfo && FSI.getSubprogram() && - DebugInfo->Verify(FSI.getSubprogram())) { - unsigned LabelID = DebugInfo->RecordRegionStart(FSI.getSubprogram()); + if (MMI && FSI.getSubprogram() && + MMI->Verify(FSI.getSubprogram())) { + unsigned LabelID = MMI->RecordRegionStart(FSI.getSubprogram()); DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getRoot(), DAG.getConstant(LabelID, MVT::i32))); } @@ -2010,12 +2010,12 @@ return 0; } case Intrinsic::dbg_declare: { - MachineDebugInfo *DebugInfo = DAG.getMachineDebugInfo(); + MachineModuleInfo *MMI = DAG.getMachineModuleInfo(); DbgDeclareInst &DI = cast<DbgDeclareInst>(I); - if (DebugInfo && DI.getVariable() && DebugInfo->Verify(DI.getVariable())) { + if (MMI && DI.getVariable() && MMI->Verify(DI.getVariable())) { SDOperand AddressOp = getValue(DI.getAddress()); if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(AddressOp)) - DebugInfo->RecordVariable(DI.getVariable(), FI->getIndex()); + MMI->RecordVariable(DI.getVariable(), FI->getIndex()); } return 0; @@ -4128,7 +4128,7 @@ FunctionLoweringInfo &FuncInfo) { std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate; { - SelectionDAG DAG(TLI, MF, getAnalysisToUpdate<MachineDebugInfo>()); + SelectionDAG DAG(TLI, MF, getAnalysisToUpdate<MachineModuleInfo>()); CurDAG = &DAG; // First step, lower LLVM code to some DAG. This DAG may use operations and @@ -4157,7 +4157,7 @@ // whether the PHI is a successor of the range check MBB or the jump table MBB if (JT.Reg) { assert(SwitchCases.empty() && "Cannot have jump table and lowered switch"); - SelectionDAG SDAG(TLI, MF, getAnalysisToUpdate<MachineDebugInfo>()); + SelectionDAG SDAG(TLI, MF, getAnalysisToUpdate<MachineModuleInfo>()); CurDAG = &SDAG; SelectionDAGLowering SDL(SDAG, TLI, FuncInfo); MachineBasicBlock *RangeBB = BB; @@ -4201,7 +4201,7 @@ // If we generated any switch lowering information, build and codegen any // additional DAGs necessary. for (unsigned i = 0, e = SwitchCases.size(); i != e; ++i) { - SelectionDAG SDAG(TLI, MF, getAnalysisToUpdate<MachineDebugInfo>()); + SelectionDAG SDAG(TLI, MF, getAnalysisToUpdate<MachineModuleInfo>()); CurDAG = &SDAG; SelectionDAGLowering SDL(SDAG, TLI, FuncInfo); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits