Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.452 -> 1.453 --- Log message: Bug in ExpandFCOPYSIGNToBitwiseOps(). Clear the old sign bit of operand 0 before or'ing in the sign bit of operand 1. --- Diffs of the changes: (+14 -4) LegalizeDAG.cpp | 18 ++++++++++++++---- 1 files changed, 14 insertions(+), 4 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.452 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.453 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.452 Thu Jan 4 15:56:39 2007 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Jan 5 15:31:51 2007 @@ -533,15 +533,17 @@ static SDOperand ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT::ValueType NVT, SelectionDAG &DAG, TargetLowering &TLI) { + MVT::ValueType VT = Node->getValueType(0); MVT::ValueType SrcVT = Node->getOperand(1).getValueType(); MVT::ValueType SrcNVT = (SrcVT == MVT::f64) ? MVT::i64 : MVT::i32; + // First get the sign bit of second operand. - SDOperand Mask = (SrcVT == MVT::f64) + SDOperand Mask1 = (SrcVT == MVT::f64) ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT) : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT); - Mask = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask); + Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1); SDOperand SignBit= DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Node->getOperand(1)); - SignBit = DAG.getNode(ISD::AND, SrcNVT, SignBit, Mask); + SignBit = DAG.getNode(ISD::AND, SrcNVT, SignBit, Mask1); // Shift right or sign-extend it if the two operands have different types. int SizeDiff = MVT::getSizeInBits(SrcNVT) - MVT::getSizeInBits(NVT); if (SizeDiff > 0) { @@ -550,8 +552,16 @@ SignBit = DAG.getNode(ISD::TRUNCATE, NVT, SignBit); } else if (SizeDiff < 0) SignBit = DAG.getNode(ISD::SIGN_EXTEND, NVT, SignBit); - // Or the first operand with the sign bit. + + // Clear the sign bit of first operand. + SDOperand Mask2 = (VT == MVT::f64) + ? DAG.getConstantFP(BitsToDouble(~(1ULL << 63)), VT) + : DAG.getConstantFP(BitsToFloat(~(1U << 31)), VT); + Mask2 = DAG.getNode(ISD::BIT_CONVERT, NVT, Mask2); SDOperand Result = DAG.getNode(ISD::BIT_CONVERT, NVT, Node->getOperand(0)); + Result = DAG.getNode(ISD::AND, NVT, Result, Mask2); + + // Or the value with the sign bit. Result = DAG.getNode(ISD::OR, NVT, Result, SignBit); return Result; } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits