Changes in directory llvm/lib/Target/PowerPC:
PPC.td updated: 1.18 -> 1.19
PPCAsmPrinter.cpp updated: 1.220 -> 1.221
PPCSubtarget.h updated: 1.19 -> 1.20
---
Log message:
Honor cpu directive, take two.
---
Diffs of the changes: (+81 -34)
PPC.td | 56 +++++++++++++++++++++++++++++++++++++-----------------
PPCAsmPrinter.cpp | 37 +++++++++++++++++++----------------
PPCSubtarget.h | 22 +++++++++++++++++++++
3 files changed, 81 insertions(+), 34 deletions(-)
Index: llvm/lib/Target/PowerPC/PPC.td
diff -u llvm/lib/Target/PowerPC/PPC.td:1.18 llvm/lib/Target/PowerPC/PPC.td:1.19
--- llvm/lib/Target/PowerPC/PPC.td:1.18 Fri Jun 16 12:34:12 2006
+++ llvm/lib/Target/PowerPC/PPC.td Tue Dec 12 14:57:07 2006
@@ -19,6 +19,21 @@
// PowerPC Subtarget features.
//
+//===----------------------------------------------------------------------===//
+// CPU Directives
//
+//===----------------------------------------------------------------------===//
+
+def Directive601 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_601", "">;
+def Directive602 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_602", "">;
+def Directive603 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
+def Directive604 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
+def Directive620 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
+def Directive7400: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_7400",
"">;
+def Directive750 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_750", "">;
+def Directive970 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_970", "">;
+def Directive32 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_32", "">;
+def Directive64 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_64", "">;
+
def Feature64Bit : SubtargetFeature<"64bit","Has64BitSupport", "true",
"Enable 64-bit instructions">;
def Feature64BitRegs : SubtargetFeature<"64bitregs","Use64BitRegs", "true",
@@ -44,26 +59,33 @@
// PowerPC processors supported.
//
-def : Processor<"generic", G3Itineraries, []>;
-def : Processor<"601", G3Itineraries, []>;
-def : Processor<"602", G3Itineraries, []>;
-def : Processor<"603", G3Itineraries, []>;
-def : Processor<"603e", G3Itineraries, []>;
-def : Processor<"603ev", G3Itineraries, []>;
-def : Processor<"604", G3Itineraries, []>;
-def : Processor<"604e", G3Itineraries, []>;
-def : Processor<"620", G3Itineraries, []>;
-def : Processor<"g3", G3Itineraries, []>;
-def : Processor<"7400", G4Itineraries, [FeatureAltivec]>;
-def : Processor<"g4", G4Itineraries, [FeatureAltivec]>;
-def : Processor<"7450", G4PlusItineraries, [FeatureAltivec]>;
-def : Processor<"g4+", G4PlusItineraries, [FeatureAltivec]>;
-def : Processor<"750", G3Itineraries, []>;
+def : Processor<"generic", G3Itineraries, [Directive32]>;
+def : Processor<"601", G3Itineraries, [Directive601]>;
+def : Processor<"602", G3Itineraries, [Directive602]>;
+def : Processor<"603", G3Itineraries, [Directive603]>;
+def : Processor<"603e", G3Itineraries, [Directive603]>;
+def : Processor<"603ev", G3Itineraries, [Directive603]>;
+def : Processor<"604", G3Itineraries, [Directive604]>;
+def : Processor<"604e", G3Itineraries, [Directive604]>;
+def : Processor<"620", G3Itineraries, [Directive620]>;
+def : Processor<"g3", G3Itineraries, [Directive7400]>;
+def : Processor<"7400", G4Itineraries, [Directive7400, FeatureAltivec]>;
+def : Processor<"g4", G4Itineraries, [Directive7400, FeatureAltivec]>;
+def : Processor<"7450", G4PlusItineraries, [Directive7400, FeatureAltivec]>;
+def : Processor<"g4+", G4PlusItineraries, [Directive750, FeatureAltivec]>;
+def : Processor<"750", G4Itineraries, [Directive750, FeatureAltivec]>;
def : Processor<"970", G5Itineraries,
- [FeatureAltivec, FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
+ [Directive970, FeatureAltivec,
+ FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
Feature64Bit /*, Feature64BitRegs */]>;
def : Processor<"g5", G5Itineraries,
- [FeatureAltivec, FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
+ [Directive970, FeatureAltivec,
+ FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
+ Feature64Bit /*, Feature64BitRegs */]>;
+def : Processor<"ppc", G3Itineraries, [Directive32]>;
+def : Processor<"ppc64", G5Itineraries,
+ [Directive64, FeatureAltivec,
+ FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
Feature64Bit /*, Feature64BitRegs */]>;
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.220
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.221
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.220 Tue Dec 12 13:26:50 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Tue Dec 12 14:57:08 2006
@@ -542,23 +542,26 @@
bool DarwinAsmPrinter::doInitialization(Module &M) {
-#if 1
- if (Subtarget.isGigaProcessor())
- O << "\t.machine ppc970\n";
-#else
- const std::string &CPU = Subtarget.getCPU();
-
- if (CPU != "generic")
- O << "\t.machine ppc" << CPU << "\n";
- else if (Subtarget.isGigaProcessor())
- O << "\t.machine ppc970\n";
- else if (Subtarget.isPPC64())
- O << "\t.machine ppc64\n";
- else if (Subtarget.hasAltivec())
- O << "\t.machine ppc7400\n";
- else
- O << "\t.machine ppc\n";
-#endif
+ static const char *CPUDirectives[] = {
+ "ppc",
+ "ppc601",
+ "ppc602",
+ "ppc603",
+ "ppc7400",
+ "ppc750",
+ "ppc970",
+ "ppc64"
+ };
+
+ unsigned Directive = Subtarget.getDarwinDirective();
+ if (Subtarget.isGigaProcessor() && Directive < PPC::DIR_970)
+ Directive = PPC::DIR_970;
+ if (Subtarget.hasAltivec() && Directive < PPC::DIR_7400)
+ Directive = PPC::DIR_7400;
+ if (Subtarget.isPPC64() && Directive < PPC::DIR_970)
+ Directive = PPC::DIR_64;
+ assert(Directive <= PPC::DIR_64 && "Directive out of range.");
+ O << "\t.machine " << CPUDirectives[Directive] << "\n";
AsmPrinter::doInitialization(M);
Index: llvm/lib/Target/PowerPC/PPCSubtarget.h
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.h:1.19
llvm/lib/Target/PowerPC/PPCSubtarget.h:1.20
--- llvm/lib/Target/PowerPC/PPCSubtarget.h:1.19 Mon Dec 11 17:22:45 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.h Tue Dec 12 14:57:08 2006
@@ -20,6 +20,21 @@
#include <string>
namespace llvm {
+
+namespace PPC {
+ // -m directive values.
+ enum {
+ DIR_32,
+ DIR_601,
+ DIR_602,
+ DIR_603,
+ DIR_7400,
+ DIR_750,
+ DIR_970,
+ DIR_64
+ };
+}
+
class Module;
class GlobalValue;
class TargetMachine;
@@ -34,6 +49,9 @@
/// Selected instruction itineraries (one entry per itinerary class.)
InstrItineraryData InstrItins;
+
+ /// Which cpu directive was used.
+ unsigned DarwinDirective;
/// Used by the ISel to turn in optimizations for POWER4-derived
architectures
bool IsGigaProcessor;
@@ -65,6 +83,10 @@
/// function for this subtarget.
unsigned getStackAlignment() const { return StackAlignment; }
+ /// getDarwinDirective - Returns the -m directive specified for the cpu.
+ ///
+ unsigned getDarwinDirective() const { return DarwinDirective; }
+
/// getInstrItins - Return the instruction itineraies based on subtarget
/// selection.
const InstrItineraryData &getInstrItineraryData() const { return InstrItins;
}
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