Changes in directory llvm/lib/Target/X86:
X86InstrInfo.cpp updated: 1.75 -> 1.76 --- Log message: convertToThreeAddress() is now responsible for updating live info as well as inserting the new MI's. --- Diffs of the changes: (+16 -8) X86InstrInfo.cpp | 24 ++++++++++++++++-------- 1 files changed, 16 insertions(+), 8 deletions(-) Index: llvm/lib/Target/X86/X86InstrInfo.cpp diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.75 llvm/lib/Target/X86/X86InstrInfo.cpp:1.76 --- llvm/lib/Target/X86/X86InstrInfo.cpp:1.75 Mon Nov 27 17:37:22 2006 +++ llvm/lib/Target/X86/X86InstrInfo.cpp Fri Dec 1 15:52:41 2006 @@ -18,6 +18,7 @@ #include "X86Subtarget.h" #include "X86TargetMachine.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/LiveVariables.h" using namespace llvm; X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) @@ -123,12 +124,20 @@ /// This method returns a null pointer if the transformation cannot be /// performed, otherwise it returns the new instruction. /// -MachineInstr *X86InstrInfo::convertToThreeAddress(MachineInstr *MI) const { +MachineInstr * +X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, + MachineBasicBlock::iterator &MBBI, + LiveVariables &LV) const { + MachineInstr *MI = MBBI; // All instructions input are two-addr instructions. Get the known operands. unsigned Dest = MI->getOperand(0).getReg(); unsigned Src = MI->getOperand(1).getReg(); MachineInstr *NewMI = NULL; + // FIXME: 16-bit LEA's are really slow on Athlons, but not bad on P4's. When + // we have subtarget support, enable the 16-bit LEA generation here. + bool DisableLEA16 = true; + switch (MI->getOpcode()) { default: break; case X86::SHUFPSrri: { @@ -140,8 +149,7 @@ unsigned M = MI->getOperand(3).getImmedValue(); if (!Subtarget->hasSSE2() || B != C) return 0; NewMI = BuildMI(get(X86::PSHUFDri), A).addReg(B).addImm(M); - NewMI->copyKillDeadInfo(MI); - return NewMI; + goto Done; } } @@ -150,10 +158,6 @@ // add and inc do. :( return 0; - // FIXME: 16-bit LEA's are really slow on Athlons, but not bad on P4's. When - // we have subtarget support, enable the 16-bit LEA generation here. - bool DisableLEA16 = true; - switch (MI->getOpcode()) { case X86::INC32r: case X86::INC64_32r: @@ -219,8 +223,12 @@ break; } - if (NewMI) +Done: + if (NewMI) { NewMI->copyKillDeadInfo(MI); + LV.instructionChanged(MI, NewMI); // Update live variables + MFI->insert(MBBI, NewMI); // Insert the new inst + } return NewMI; } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits