[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp PPCRegisterInfo.cpp PPCRegisterInfo.h

[Evan Cheng]

Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.cpp updated: 1.29 -> 1.30
PPCRegisterInfo.cpp updated: 1.80 -> 1.81
PPCRegisterInfo.h updated: 1.16 -> 1.17
---
Log message:

Matches MachineInstr changes.

---
Diffs of the changes:  (+14 -12)

 PPCInstrInfo.cpp    |    2 +-
 PPCRegisterInfo.cpp |   21 +++++++++++----------
 PPCRegisterInfo.h   |    3 ++-
 3 files changed, 14 insertions(+), 12 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.29 
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.30
--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.29       Sat Oct 28 12:35:02 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp    Mon Nov 13 17:36:35 2006
@@ -20,7 +20,7 @@
 
 PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
   : TargetInstrInfo(PPCInsts, sizeof(PPCInsts)/sizeof(PPCInsts[0])), TM(tm),
-    RI(*TM.getSubtargetImpl()) {}
+    RI(*TM.getSubtargetImpl(), *this) {}
 
 /// getPointerRegClass - Return the register class to use to hold pointers.
 /// This is used for addressing modes.


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.80 
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.81
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.80    Sat Nov 11 16:22:07 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Mon Nov 13 17:36:35 2006
@@ -80,9 +80,10 @@
   }
 }
 
-PPCRegisterInfo::PPCRegisterInfo(const PPCSubtarget &ST)
+PPCRegisterInfo::PPCRegisterInfo(const PPCSubtarget &ST,
+                                 const TargetInstrInfo &tii)
   : PPCGenRegisterInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP),
-    Subtarget(ST) {
+    Subtarget(ST), TII(tii) {
   ImmToIdxMap[PPC::LD]   = PPC::LDX;    ImmToIdxMap[PPC::STD]  = PPC::STDX;
   ImmToIdxMap[PPC::LBZ]  = PPC::LBZX;   ImmToIdxMap[PPC::STB]  = PPC::STBX;
   ImmToIdxMap[PPC::LHZ]  = PPC::LHZX;   ImmToIdxMap[PPC::LHA]  = PPC::LHAX;
@@ -322,39 +323,39 @@
        MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) {
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
-      return addFrameReference(BuildMI(PPC::STW,
+      return addFrameReference(BuildMI(TII, PPC::STW,
                                        3).addReg(InReg), FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
-      return addFrameReference(BuildMI(PPC::LWZ, 2, OutReg), FrameIndex);
+      return addFrameReference(BuildMI(TII, PPC::LWZ, 2, OutReg), FrameIndex);
     }
   } else if ((Opc == PPC::OR8 &&
               MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) {
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
-      return addFrameReference(BuildMI(PPC::STD,
+      return addFrameReference(BuildMI(TII, PPC::STD,
                                        3).addReg(InReg), FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
-      return addFrameReference(BuildMI(PPC::LD, 2, OutReg), FrameIndex);
+      return addFrameReference(BuildMI(TII, PPC::LD, 2, OutReg), FrameIndex);
     }
   } else if (Opc == PPC::FMRD) {
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
-      return addFrameReference(BuildMI(PPC::STFD,
+      return addFrameReference(BuildMI(TII, PPC::STFD,
                                        3).addReg(InReg), FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
-      return addFrameReference(BuildMI(PPC::LFD, 2, OutReg), FrameIndex);
+      return addFrameReference(BuildMI(TII, PPC::LFD, 2, OutReg), FrameIndex);
     }
   } else if (Opc == PPC::FMRS) {
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
-      return addFrameReference(BuildMI(PPC::STFS,
+      return addFrameReference(BuildMI(TII, PPC::STFS,
                                        3).addReg(InReg), FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
-      return addFrameReference(BuildMI(PPC::LFS, 2, OutReg), FrameIndex);
+      return addFrameReference(BuildMI(TII, PPC::LFS, 2, OutReg), FrameIndex);
     }
   }
   return 0;


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.16 
llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.17
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.16      Mon Jul 10 19:48:23 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h   Mon Nov 13 17:36:35 2006
@@ -25,8 +25,9 @@
 class PPCRegisterInfo : public PPCGenRegisterInfo {
   std::map<unsigned, unsigned> ImmToIdxMap;
   const PPCSubtarget &Subtarget;
+  const TargetInstrInfo &TII;
 public:
-  PPCRegisterInfo(const PPCSubtarget &SubTarget);
+  PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
   
   /// getRegisterNumbering - Given the enum value for some register, e.g.
   /// PPC::F14, return the number that it corresponds to (e.g. 14).



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