Changes in directory llvm/lib/Target/X86:
X86FloatingPoint.cpp updated: 1.56 -> 1.57
X86ISelDAGToDAG.cpp updated: 1.125 -> 1.126
X86ISelLowering.cpp updated: 1.290 -> 1.291
---
Log message:
Add implicit use / def operands to created MI's.
---
Diffs of the changes: (+8 -10)
X86FloatingPoint.cpp | 2 +-
X86ISelDAGToDAG.cpp | 14 ++++++--------
X86ISelLowering.cpp | 2 +-
3 files changed, 8 insertions(+), 10 deletions(-)
Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.56
llvm/lib/Target/X86/X86FloatingPoint.cpp:1.57
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.56 Thu Nov 9 19:28:43 2006
+++ llvm/lib/Target/X86/X86FloatingPoint.cpp Sat Nov 11 04:21:44 2006
@@ -232,7 +232,7 @@
case X86II::ZeroArgFP: handleZeroArgFP(I); break;
case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0)
case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0))
- case X86II::TwoArgFP: handleTwoArgFP(I); break;
+ case X86II::TwoArgFP: handleTwoArgFP(I); break;
case X86II::CompareFP: handleCompareFP(I); break;
case X86II::CondMovFP: handleCondMovFP(I); break;
case X86II::SpecialFP: handleSpecialFP(I); break;
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.125
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.126
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.125 Sat Nov 11 01:19:36 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Sat Nov 11 04:21:44 2006
@@ -525,12 +525,8 @@
// Finally, if we found any FP code, emit the FP_REG_KILL instruction.
if (ContainsFPCode) {
- const TargetInstrDescriptor &II=
TM.getInstrInfo()->get(X86::FP_REG_KILL);
- MachineInstrBuilder MIB =
- BuildMI(*BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
- for (const unsigned *ImplicitDefs = II.ImplicitDefs;
- *ImplicitDefs; ++ImplicitDefs)
- MIB = MIB.addReg(*ImplicitDefs, true, true);
+ BuildMI(*BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0).
+ addImplicitDefsUses();
++NumFPKill;
}
}
@@ -541,7 +537,8 @@
void X86DAGToDAGISel::EmitSpecialCodeForMain(MachineBasicBlock *BB,
MachineFrameInfo *MFI) {
if (Subtarget->isTargetCygwin())
- BuildMI(BB, X86::CALLpcrel32, 1).addExternalSymbol("__main");
+ BuildMI(BB, X86::CALLpcrel32, 1).addExternalSymbol("__main").
+ addImplicitDefsUses();
// Switch the FPU to 64-bit precision mode for better compatibility and
speed.
int CWFrameIdx = MFI->CreateStackObject(2, 2);
@@ -952,7 +949,8 @@
// type of register here.
GlobalBaseReg = RegMap->createVirtualRegister(X86::GR32RegisterClass);
BuildMI(FirstMBB, MBBI, X86::MovePCtoStack, 0);
- BuildMI(FirstMBB, MBBI, X86::POP32r, 1, GlobalBaseReg);
+ BuildMI(FirstMBB, MBBI, X86::POP32r, 1, GlobalBaseReg).
+ addImplicitDefsUses();
}
return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).Val;
}
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.290
llvm/lib/Target/X86/X86ISelLowering.cpp:1.291
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.290 Fri Nov 10 15:43:37 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Sat Nov 11 04:21:44 2006
@@ -5076,7 +5076,7 @@
MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
unsigned Opc =
X86::GetCondBranchFromCond((X86::CondCode)MI->getOperand(3).getImm());
- BuildMI(BB, Opc, 1).addMBB(sinkMBB);
+ BuildMI(BB, Opc, 1).addMBB(sinkMBB).addImplicitDefsUses();
MachineFunction *F = BB->getParent();
F->getBasicBlockList().insert(It, copy0MBB);
F->getBasicBlockList().insert(It, sinkMBB);
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