Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.315 -> 1.316 --- Log message: For PR950: http://llvm.org/PR950 : This patch converts the old SHR instruction into two instructions, AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not dependent on the sign of their operands. --- Diffs of the changes: (+2 -4) SelectionDAGISel.cpp | 6 ++---- 1 files changed, 2 insertions(+), 4 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.315 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.316 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.315 Thu Nov 2 14:25:49 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Nov 8 00:47:33 2006 @@ -538,10 +538,8 @@ void visitOr (User &I) { visitIntBinary(I, ISD::OR, ISD::VOR); } void visitXor(User &I) { visitIntBinary(I, ISD::XOR, ISD::VXOR); } void visitShl(User &I) { visitShift(I, ISD::SHL); } - void visitShr(User &I) { - visitShift(I, I.getType()->isUnsigned() ? ISD::SRL : ISD::SRA); - } - + void visitLShr(User &I) { visitShift(I, ISD::SRL); } + void visitAShr(User &I) { visitShift(I, ISD::SRA); } void visitSetCC(User &I, ISD::CondCode SignedOpc, ISD::CondCode UnsignedOpc, ISD::CondCode FPOpc); void visitSetEQ(User &I) { visitSetCC(I, ISD::SETEQ, ISD::SETEQ, _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits