Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.99 -> 1.100
---
Log message:
Add operand constraints to TargetInstrInfo.
---
Diffs of the changes: (+21 -0)
TargetInstrInfo.h | 21 +++++++++++++++++++++
1 files changed, 21 insertions(+)
Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.99
llvm/include/llvm/Target/TargetInstrInfo.h:1.100
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.99 Sat Oct 28 12:29:57 2006
+++ llvm/include/llvm/Target/TargetInstrInfo.h Tue Oct 31 18:25:20 2006
@@ -94,6 +94,9 @@
/// if the operand is a register. If not, this contains 0.
unsigned short RegClass;
unsigned short Flags;
+ /// Lower 16 bits are used to specify which constraints are set. The higher
16
+ /// bits are used to specify the value of constraints (4 bits each).
+ unsigned int Constraints;
/// Currently no other information.
};
@@ -219,6 +222,24 @@
return get(Opcode).Flags & M_VARIABLE_OPS;
}
+ // Operand constraints: only "tied_to" for now.
+ enum OperandConstraint {
+ TIED_TO = 0 // Must be allocated the same register as.
+ };
+
+ /// getOperandConstraint - Returns the value of the specific constraint if
+ /// it is set. Returns -1 if it is not set.
+ int getOperandConstraint(MachineOpCode Opcode, unsigned OpNum,
+ OperandConstraint Constraint) {
+ assert(OpNum < get(Opcode).numOperands &&
+ "Invalid operand # of TargetInstrInfo");
+ if (get(Opcode).OpInfo[OpNum].Constraints & (1 << Constraint)) {
+ unsigned Pos = 16 + Constraint * 4;
+ return (int)(get(Opcode).OpInfo[OpNum].Constraints >> Pos) & 0xf;
+ }
+ return -1;
+ }
+
/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
/// instruction if it has one. This is used by codegen passes that update
/// DWARF line number info as they modify the code.
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