Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.294 -> 1.295
---
Log message:
Minor tweak. Instead of generating:
movl 32(%esp), %eax
cmpl $1, %eax
je LBB1_1 #bb
LBB1_4: #entry
cmpl $2, %eax
je LBB1_2 #bb2
jmp LBB1_3 #UnifiedReturnBlock
LBB1_1: #bb
notice that we would miss the fall through and emit this instead:
movl 32(%esp), %eax
cmpl $2, %eax
je LBB1_2 #bb2
LBB1_4: #entry
cmpl $1, %eax
jne LBB1_3 #UnifiedReturnBlock
LBB1_1: #bb
---
Diffs of the changes: (+13 -0)
SelectionDAGISel.cpp | 13 +++++++++++++
1 files changed, 13 insertions(+)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.294
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.295
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.294 Sun Oct 22
18:00:53 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Oct 23 13:38:22 2006
@@ -936,6 +936,19 @@
// use bit manipulation to do two compares at once. For example:
// "if (X == 6 || X == 4)" -> "if ((X|2) == 6)"
+ // Rearrange the case blocks so that the last one falls through if
possible.
+ if (NextBlock && Default != NextBlock && Cases.back().second != NextBlock)
{
+ // The last case block won't fall through into 'NextBlock' if we emit the
+ // branches in this order. See if rearranging a case value would help.
+ for (unsigned i = 0, e = Cases.size()-1; i != e; ++i) {
+ if (Cases[i].second == NextBlock) {
+ std::swap(Cases[i], Cases.back());
+ break;
+ }
+ }
+ }
+
+
// Create a CaseBlock record representing a conditional branch to
// the Case's target mbb if the value being switched on SV is equal
// to C.
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