Changes in directory llvm/lib/Bytecode/Reader:
Reader.cpp updated: 1.198.2.5 -> 1.198.2.6 Reader.h updated: 1.34.2.1 -> 1.34.2.2 --- Log message: Improve documentation on opcode upgrade from obsolete versions. Fully document all opcodes. Don't try to jump the gun on REM conversions. --- Diffs of the changes: (+53 -32) Reader.cpp | 77 +++++++++++++++++++++++++++++++++++++++---------------------- Reader.h | 8 ++---- 2 files changed, 53 insertions(+), 32 deletions(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.5 llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.6 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.5 Sun Oct 22 03:59:00 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Sun Oct 22 18:28:40 2006 @@ -595,11 +595,12 @@ return Result; // We're dealing with an upgrade situation. For each of the opcode values, - // perform the necessary convertion. + // perform the necessary conversion. switch (Opcode) { default: // Pass Through // If we don't match any of the cases here then the opcode is fine the - // way it is. + // way it is. That will happen for the opcodes > 53 which are the + // volatile load/store, and call/invoke with calling conventions. break; case 1: // Ret Opcode = Instruction::Ret; @@ -630,9 +631,9 @@ break; case 10: // Div // The type of the instruction is based on the operands. We need to select - // either udiv or sdiv based on that type. This expression selects the - // cases where the type is floating point or signed in which case we - // generated an sdiv instruction. + // fdiv, udiv or sdiv based on that type. The iType values are hardcoded + // to the values used in bytecode version 5 (and prior) because it is + // likely these codes will change in future versions of LLVM. if (iType == 10 || iType == 11 ) Opcode = Instruction::FDiv; else if (iType >= 2 && iType <= 9 && iType % 2 != 0) @@ -642,16 +643,8 @@ break; case 11: // Rem - // As with "Div", make the signed/unsigned Rem instruction choice based - // on the type of the instruction. - if (iType == 10 || iType == 11) - Opcode = Instruction::Rem; - else if (iType >= 2 && iType <= 9 && iType % 2 != 0) - Opcode = Instruction::Rem; - else Opcode = Instruction::Rem; break; - case 12: // And Opcode = Instruction::And; break; @@ -717,12 +710,17 @@ Function* NF = TheModule->getOrInsertFunction( "llvm.va_copy", ArgTy, ArgTy, (Type *)0); - //b = vanext a, t -> - //foo = alloca 1 of t - //bar = vacopy a - //store bar -> foo - //tmp = vaarg foo, t - //b = load foo + // In llvm 1.6 the VANext instruction was dropped because it was only + // necessary to have a VAArg instruction. The code below transforms an + // old vanext instruction into the equivalent code given only the + // availability of the new vaarg instruction. Essentially, the transform + // is as follows: + // b = vanext a, t -> + // foo = alloca 1 of t + // bar = vacopy a + // store bar -> foo + // tmp = vaarg foo, t + // b = load foo AllocaInst* foo = new AllocaInst(ArgTy, 0, "vanext.fix"); BB->getInstList().push_back(foo); CallInst* bar = new CallInst(NF, getValue(iType, Oprnds[0])); @@ -738,11 +736,15 @@ Function* NF = TheModule->getOrInsertFunction( "llvm.va_copy", ArgTy, ArgTy, (Type *)0); - //b = vaarg a, t -> - //foo = alloca 1 of t - //bar = vacopy a - //store bar -> foo - //b = vaarg foo, t + // In llvm 1.6 the VAArg's instruction semantics were changed. The code + // below transforms an old vaarg instruction into the equivalent code + // given only the availability of the new vaarg instruction. Essentially, + // the transform is as follows: + // b = vaarg a, t -> + // foo = alloca 1 of t + // bar = vacopy a + // store bar -> foo + // b = vaarg foo, t AllocaInst* foo = new AllocaInst(ArgTy, 0, "vaarg.fix"); BB->getInstList().push_back(foo); CallInst* bar = new CallInst(NF, getValue(iType, Oprnds[0])); @@ -772,8 +774,20 @@ case 40: // ShuffleVector Opcode = Instruction::ShuffleVector; break; + case 56: // Invoke with encoded CC + case 57: // Invoke Fast CC + case 58: // Call with extra operand for calling conv + case 59: // tail call, Fast CC + case 60: // normal call, Fast CC + case 61: // tail call, C Calling Conv + case 62: // volatile load + case 63: // volatile store + // In all these cases, we pass the opcode through. The new version uses + // the same code (for now, this might change in 2.0). These are listed + // here to document the opcodes in use in vers 5 bytecode and to make it + // easier to migrate these opcodes in the future. + break; } - return Result; } @@ -1600,6 +1614,14 @@ } } +// Upgrade obsolte constant expression opcodes (ver. 5 and prior) to the new +// values used after ver 6. bytecode format. The operands are provided to the +// function so that decisions based on the operand type can be made when +// auto-upgrading obsolete opcodes to the new ones. +// NOTE: This code needs to be kept synchronized with handleObsoleteOpcodes. +// We can't use that function because of that functions argument requirements. +// This function only deals with the subset of opcodes that are applicable to +// constant expressions and is therefore simpler than handleObsoleteOpcodes. inline unsigned fixCEOpcodes( unsigned Opcode, const std::vector<Constant*> &ArgVec ) { @@ -2608,8 +2630,9 @@ // In version 5 and prior, instructions were signless while integer types // were signed. In version 6, instructions became signed and types became // signless. For example in version 5 we have the DIV instruction but in - // version 6 we have SDIV and UDIV to replace it. This causes a renumbering - // of the instruction codes in version 6 that must be factored in. + // version 6 we have FDIV, SDIV and UDIV to replace it. This caused a + // renumbering of the instruction codes in version 6 that must be dealt with + // when reading old bytecode files. hasSignlessInstructions = true; // In version 5 and prior, the integer types were distinguished by sign. Index: llvm/lib/Bytecode/Reader/Reader.h diff -u llvm/lib/Bytecode/Reader/Reader.h:1.34.2.1 llvm/lib/Bytecode/Reader/Reader.h:1.34.2.2 --- llvm/lib/Bytecode/Reader/Reader.h:1.34.2.1 Sat Oct 21 03:59:42 2006 +++ llvm/lib/Bytecode/Reader/Reader.h Sun Oct 22 18:28:40 2006 @@ -348,13 +348,11 @@ // unreachable instruction. bool hasNoUnreachableInst; - // In LLVM 1.6 the VAArg instruction was changed and the VANext instruction - // was dropped. version 4 // In version 5 and prior, instructions were signless. In version 6, // instructions became signed. For example in version 5 we have the DIV - // instruction but in version 6 we have SDIV and UDIV to replace it. This - // causes a renumbering of the instruction codes in version 6 that must be - // factored in. + // instruction but in version 6 we have FDIV, SDIV and UDIV to replace it. + // This causes a renumbering of the instruction codes in version 6 that must + // be dealt with when reading old bytecode files. bool hasSignlessInstructions; // In version 5 and prior, the integer types were distinguished by sign. _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits