Changes in directory llvm/lib/Target/Alpha:
AlphaISelLowering.cpp updated: 1.68 -> 1.69
AlphaInstrInfo.td updated: 1.129 -> 1.130
---
Log message:
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
---
Diffs of the changes: (+27 -30)
AlphaISelLowering.cpp | 39 ++++++++++++++++++---------------------
AlphaInstrInfo.td | 18 +++++++++---------
2 files changed, 27 insertions(+), 30 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.68
llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.69
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.68 Wed Oct 11 11:24:51 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Fri Oct 13 16:14:26 2006
@@ -59,12 +59,12 @@
setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
setLoadXAction(ISD::SEXTLOAD, MVT::i8, Expand);
setLoadXAction(ISD::SEXTLOAD, MVT::i16, Expand);
+
+ setStoreXAction(MVT::i1, Promote);
// setOperationAction(ISD::BRIND, MVT::i64, Expand);
setOperationAction(ISD::BR_CC, MVT::Other, Expand);
- setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
-
- setOperationAction(ISD::TRUNCSTORE, MVT::i1, Promote);
+ setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
@@ -267,14 +267,14 @@
int FI = MFI->CreateFixedObject(8, -8 * (6 - i));
if (i == 0) VarArgsBase = FI;
SDOperand SDFI = DAG.getFrameIndex(FI, MVT::i64);
- LS.push_back(DAG.getStore(Root, argt, SDFI, DAG.getSrcValue(NULL)));
+ LS.push_back(DAG.getStore(Root, argt, SDFI, NULL, 0));
if (MRegisterInfo::isPhysicalRegister(args_float[i]))
args_float[i] = AddLiveIn(MF, args_float[i], &Alpha::F8RCRegClass);
argt = DAG.getCopyFromReg(Root, args_float[i], MVT::f64);
FI = MFI->CreateFixedObject(8, - 8 * (12 - i));
SDFI = DAG.getFrameIndex(FI, MVT::i64);
- LS.push_back(DAG.getStore(Root, argt, SDFI, DAG.getSrcValue(NULL)));
+ LS.push_back(DAG.getStore(Root, argt, SDFI, NULL, 0));
}
//Set up a token factor with all the stack traffic
@@ -414,7 +414,7 @@
DAG.getMachineFunction().getFrameInfo()->CreateStackObject(8, 8);
SDOperand FI = DAG.getFrameIndex(FrameIdx, MVT::i64);
SDOperand ST = DAG.getStore(DAG.getEntryNode(),
- Op.getOperand(0), FI, DAG.getSrcValue(0));
+ Op.getOperand(0), FI, NULL, 0);
LD = DAG.getLoad(MVT::f64, ST, FI, NULL, 0);
}
SDOperand FP = DAG.getNode(isDouble?AlphaISD::CVTQT_:AlphaISD::CVTQS_,
@@ -436,8 +436,7 @@
int FrameIdx =
DAG.getMachineFunction().getFrameInfo()->CreateStackObject(8, 8);
SDOperand FI = DAG.getFrameIndex(FrameIdx, MVT::i64);
- SDOperand ST = DAG.getStore(DAG.getEntryNode(),
- src, FI, DAG.getSrcValue(0));
+ SDOperand ST = DAG.getStore(DAG.getEntryNode(), src, FI, NULL, 0);
return DAG.getLoad(MVT::i64, ST, FI, NULL, 0);
}
}
@@ -531,10 +530,8 @@
SDOperand NewOffset = DAG.getNode(ISD::ADD, MVT::i64, Offset,
DAG.getConstant(8, MVT::i64));
- SDOperand Update = DAG.getNode(ISD::TRUNCSTORE, MVT::Other,
- Offset.getValue(1), NewOffset,
- Tmp, DAG.getSrcValue(0),
- DAG.getValueType(MVT::i32));
+ SDOperand Update = DAG.getTruncStore(Offset.getValue(1), NewOffset,
+ Tmp, NULL, 0, MVT::i32);
SDOperand Result;
if (Op.getValueType() == MVT::i32)
@@ -548,33 +545,33 @@
SDOperand Chain = Op.getOperand(0);
SDOperand DestP = Op.getOperand(1);
SDOperand SrcP = Op.getOperand(2);
- SDOperand DestS = Op.getOperand(3);
+ SrcValueSDNode *DestS = cast<SrcValueSDNode>(Op.getOperand(3));
SrcValueSDNode *SrcS = cast<SrcValueSDNode>(Op.getOperand(4));
SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP,
SrcS->getValue(), SrcS->getOffset());
- SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS);
+ SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP,
DestS->getValue(),
+ DestS->getOffset());
SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP,
DAG.getConstant(8, MVT::i64));
Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP, NULL,0,
MVT::i32);
SDOperand NPD = DAG.getNode(ISD::ADD, MVT::i64, DestP,
DAG.getConstant(8, MVT::i64));
- return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Val.getValue(1),
- Val, NPD,
DAG.getSrcValue(0),DAG.getValueType(MVT::i32));
+ return DAG.getTruncStore(Val.getValue(1), Val, NPD, NULL, 0, MVT::i32);
}
case ISD::VASTART: {
SDOperand Chain = Op.getOperand(0);
SDOperand VAListP = Op.getOperand(1);
- SDOperand VAListS = Op.getOperand(2);
+ SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(3));
// vastart stores the address of the VarArgsBase and VarArgsOffset
SDOperand FR = DAG.getFrameIndex(VarArgsBase, MVT::i64);
- SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS);
+ SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS->getValue(),
+ VAListS->getOffset());
SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
DAG.getConstant(8, MVT::i64));
- return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, S1,
- DAG.getConstant(VarArgsOffset, MVT::i64), SA2,
- DAG.getSrcValue(0), DAG.getValueType(MVT::i32));
+ return DAG.getTruncStore(S1, DAG.getConstant(VarArgsOffset, MVT::i64),
+ SA2, NULL, 0, MVT::i32);
}
}
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.129
llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.130
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.129 Thu Oct 12 13:00:14 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Fri Oct 13 16:14:26 2006
@@ -501,17 +501,17 @@
def LDWUr : MForm<0x0C, 0, 1, "ldwu $RA,$DISP($RB)\t\t!gprellow",
[(set GPRC:$RA, (zextloadi16 (Alpha_gprello
tglobaladdr:$DISP, GPRC:$RB)))], s_ild>;
def STB : MForm<0x0E, 1, 0, "stb $RA,$DISP($RB)",
- [(truncstore GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP), i8)],
s_ist>;
+ [(truncstorei8 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))],
s_ist>;
def STBr : MForm<0x0E, 1, 0, "stb $RA,$DISP($RB)\t\t!gprellow",
- [(truncstore GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP,
GPRC:$RB), i8)], s_ist>;
+ [(truncstorei8 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP,
GPRC:$RB))], s_ist>;
def STW : MForm<0x0D, 1, 0, "stw $RA,$DISP($RB)",
- [(truncstore GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP), i16)],
s_ist>;
+ [(truncstorei16 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))],
s_ist>;
def STWr : MForm<0x0D, 1, 0, "stw $RA,$DISP($RB)\t\t!gprellow",
- [(truncstore GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP,
GPRC:$RB), i16)], s_ist>;
+ [(truncstorei16 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP,
GPRC:$RB))], s_ist>;
def STL : MForm<0x2C, 1, 0, "stl $RA,$DISP($RB)",
- [(truncstore GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP), i32)],
s_ist>;
+ [(truncstorei32 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))],
s_ist>;
def STLr : MForm<0x2C, 1, 0, "stl $RA,$DISP($RB)\t\t!gprellow",
- [(truncstore GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP,
GPRC:$RB), i32)], s_ist>;
+ [(truncstorei32 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP,
GPRC:$RB))], s_ist>;
def STQ : MForm<0x2D, 1, 0, "stq $RA,$DISP($RB)",
[(store GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>;
def STQr : MForm<0x2D, 1, 0, "stq $RA,$DISP($RB)\t\t!gprellow",
@@ -609,11 +609,11 @@
(STT F8RC:$DATA, 0, GPRC:$addr)>;
def : Pat<(store F4RC:$DATA, GPRC:$addr),
(STS F4RC:$DATA, 0, GPRC:$addr)>;
-def : Pat<(truncstore GPRC:$DATA, GPRC:$addr, i32),
+def : Pat<(truncstorei32 GPRC:$DATA, GPRC:$addr),
(STL GPRC:$DATA, 0, GPRC:$addr)>;
-def : Pat<(truncstore GPRC:$DATA, GPRC:$addr, i16),
+def : Pat<(truncstorei16 GPRC:$DATA, GPRC:$addr),
(STW GPRC:$DATA, 0, GPRC:$addr)>;
-def : Pat<(truncstore GPRC:$DATA, GPRC:$addr, i8),
+def : Pat<(truncstorei8 GPRC:$DATA, GPRC:$addr),
(STB GPRC:$DATA, 0, GPRC:$addr)>;
_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
