Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.266 -> 1.267
---
Log message:
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.
---
Diffs of the changes: (+2 -1)
X86ISelLowering.cpp | 3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.266
llvm/lib/Target/X86/X86ISelLowering.cpp:1.267
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.266 Tue Oct 3 12:18:42 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Oct 3 19:56:09 2006
@@ -75,6 +75,8 @@
if (Subtarget->is64Bit())
addRegisterClass(MVT::i64, X86::GR64RegisterClass);
+ setLoadXAction(ISD::SEXTLOAD, MVT::i1, Expand);
+
// Promote all UINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have this
// operation.
setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote);
@@ -155,7 +157,6 @@
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand);
- setOperationAction(ISD::SEXTLOAD , MVT::i1 , Expand);
setOperationAction(ISD::FREM , MVT::f64 , Expand);
setOperationAction(ISD::CTPOP , MVT::i8 , Expand);
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