Changes in directory llvm/include/llvm/CodeGen:
SelectionDAG.h updated: 1.131 -> 1.132 SelectionDAGNodes.h updated: 1.148 -> 1.149 --- Log message: Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an extra operand to LOADX to specify the exact value extension type. --- Diffs of the changes: (+53 -8) SelectionDAG.h | 5 ++-- SelectionDAGNodes.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++------ 2 files changed, 53 insertions(+), 8 deletions(-) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.131 llvm/include/llvm/CodeGen/SelectionDAG.h:1.132 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.131 Mon Oct 2 07:26:53 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Tue Oct 3 19:50:21 2006 @@ -303,8 +303,9 @@ SDOperand SV); SDOperand getVecLoad(unsigned Count, MVT::ValueType VT, SDOperand Chain, SDOperand Ptr, SDOperand SV); - SDOperand getExtLoad(unsigned Opcode, MVT::ValueType VT, SDOperand Chain, - SDOperand Ptr, SDOperand SV, MVT::ValueType EVT); + SDOperand getExtLoad(ISD::LoadExtType LType, MVT::ValueType VT, + SDOperand Chain, SDOperand Ptr, SDOperand SV, + MVT::ValueType EVT); // getSrcValue - construct a node to track a Value* through the backend SDOperand getSrcValue(const Value* I, int offset = 0); Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.148 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.149 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.148 Sun Sep 24 14:43:29 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Tue Oct 3 19:50:21 2006 @@ -380,11 +380,11 @@ // the elements, a token chain, a pointer operand, and a SRCVALUE node. VLOAD, - // EXTLOAD, SEXTLOAD, ZEXTLOAD - These three operators all load a value from - // memory and extend them to a larger value (e.g. load a byte into a word - // register). All three of these have four operands, a token chain, a - // pointer to load from, a SRCVALUE for alias analysis, and a VALUETYPE node - // indicating the type to load. + // Load a value from memory and extend them to a larger value (e.g. load a + // byte into a word register). All three of these have four operands, a + // token chain, a pointer to load from, a SRCVALUE for alias analysis, a + // VALUETYPE node indicating the type to load, and an enum indicating what + // sub-type of LOADX it is: // // SEXTLOAD loads the integer operand and sign extends it to a larger // integer result type. @@ -393,7 +393,7 @@ // EXTLOAD is used for three things: floating point extending loads, // integer extending loads [the top bits are undefined], and vector // extending loads [load into low elt]. - EXTLOAD, SEXTLOAD, ZEXTLOAD, + LOADX, // TRUNCSTORE - This operators truncates (for integer) or rounds (for FP) a // value and stores it to memory in one operation. This can be used for @@ -534,6 +534,17 @@ bool isBuildVectorAllZeros(const SDNode *N); //===--------------------------------------------------------------------===// + /// LoadExtType enum - This enum defines the three variants of LOADEXT + /// (load with extension). + /// + enum LoadExtType { + EXTLOAD, + SEXTLOAD, + ZEXTLOAD, + LAST_LOADX_TYPE + }; + + //===--------------------------------------------------------------------===// /// ISD::CondCode enum - These are ordered carefully to make the bitfields /// below work out, when considering SETFALSE (something that never exists /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered @@ -671,6 +682,7 @@ inline unsigned getOpcode() const; inline unsigned getNumOperands() const; inline const SDOperand &getOperand(unsigned i) const; + inline uint64_t getConstantOperandVal(unsigned i) const; inline bool isTargetOpcode() const; inline unsigned getTargetOpcode() const; @@ -775,10 +787,15 @@ /// unsigned getNumOperands() const { return NumOperands; } + /// getConstantOperandVal - Helper method returns the integer value of a + /// ConstantSDNode operand. + uint64_t getConstantOperandVal(unsigned Num) const; + const SDOperand &getOperand(unsigned Num) const { assert(Num < NumOperands && "Invalid child # of SDNode!"); return OperandList[Num]; } + typedef const SDOperand* op_iterator; op_iterator op_begin() const { return OperandList; } op_iterator op_end() const { return OperandList+NumOperands; } @@ -997,6 +1014,9 @@ inline const SDOperand &SDOperand::getOperand(unsigned i) const { return Val->getOperand(i); } +inline uint64_t SDOperand::getConstantOperandVal(unsigned i) const { + return Val->getConstantOperandVal(i); +} inline bool SDOperand::isTargetOpcode() const { return Val->isTargetOpcode(); } @@ -1399,6 +1419,30 @@ const ilist_iterator<SDNode> &Y) {} }; +namespace ISD { + /// isEXTLoad - Returns true if the specified node is a EXTLOAD. + /// + inline bool isEXTLoad(const SDNode *N) { + return N->getOpcode() == ISD::LOADX && + N->getConstantOperandVal(4) == ISD::EXTLOAD; + } + + /// isSEXTLoad - Returns true if the specified node is a SEXTLOAD. + /// + inline bool isSEXTLoad(const SDNode *N) { + return N->getOpcode() == ISD::LOADX && + N->getConstantOperandVal(4) == ISD::SEXTLOAD; + } + + /// isZEXTLoad - Returns true if the specified node is a ZEXTLOAD. + /// + inline bool isZEXTLoad(const SDNode *N) { + return N->getOpcode() == ISD::LOADX && + N->getConstantOperandVal(4) == ISD::ZEXTLOAD; + } +} + + } // end llvm namespace #endif _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits