Changes in directory llvm/lib/Target/X86:
X86InstrSSE.td updated: 1.132 -> 1.133 --- Log message: These don't have immediate operands. --- Diffs of the changes: (+64 -64) X86InstrSSE.td | 128 ++++++++++++++++++++++++++++----------------------------- 1 files changed, 64 insertions(+), 64 deletions(-) Index: llvm/lib/Target/X86/X86InstrSSE.td diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.132 llvm/lib/Target/X86/X86InstrSSE.td:1.133 --- llvm/lib/Target/X86/X86InstrSSE.td:1.132 Sun Sep 10 21:19:56 2006 +++ llvm/lib/Target/X86/X86InstrSSE.td Tue Oct 3 01:55:11 2006 @@ -1603,38 +1603,38 @@ } let isTwoAddress = 1 in { -def PSLLWrr : PDIi8<0xF1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - "psllw {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1, - VR128:$src2))]>; -def PSLLWrm : PDIi8<0xF1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), - "psllw {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1, - (bc_v4i32 (loadv2i64 addr:$src2))))]>; +def PSLLWrr : PDI<0xF1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psllw {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1, + VR128:$src2))]>; +def PSLLWrm : PDI<0xF1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), + "psllw {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1, + (bc_v4i32 (loadv2i64 addr:$src2))))]>; def PSLLWri : PDIi8<0x71, MRM6r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "psllw {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1, (scalar_to_vector (i32 imm:$src2))))]>; -def PSLLDrr : PDIi8<0xF2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - "pslld {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1, - VR128:$src2))]>; -def PSLLDrm : PDIi8<0xF2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), - "pslld {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1, - (bc_v4i32 (loadv2i64 addr:$src2))))]>; +def PSLLDrr : PDI<0xF2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "pslld {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1, + VR128:$src2))]>; +def PSLLDrm : PDI<0xF2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), + "pslld {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1, + (bc_v4i32 (loadv2i64 addr:$src2))))]>; def PSLLDri : PDIi8<0x72, MRM6r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "pslld {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1, (scalar_to_vector (i32 imm:$src2))))]>; -def PSLLQrr : PDIi8<0xF3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - "psllq {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1, - VR128:$src2))]>; -def PSLLQrm : PDIi8<0xF3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), - "psllq {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1, - (bc_v4i32 (loadv2i64 addr:$src2))))]>; +def PSLLQrr : PDI<0xF3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psllq {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1, + VR128:$src2))]>; +def PSLLQrm : PDI<0xF3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), + "psllq {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1, + (bc_v4i32 (loadv2i64 addr:$src2))))]>; def PSLLQri : PDIi8<0x73, MRM6r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "psllq {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1, @@ -1642,38 +1642,38 @@ def PSLLDQri : PDIi8<0x73, MRM7r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "pslldq {$src2, $dst|$dst, $src2}", []>; -def PSRLWrr : PDIi8<0xD1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - "psrlw {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1, - VR128:$src2))]>; -def PSRLWrm : PDIi8<0xD1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), - "psrlw {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1, - (bc_v4i32 (loadv2i64 addr:$src2))))]>; +def PSRLWrr : PDI<0xD1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psrlw {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1, + VR128:$src2))]>; +def PSRLWrm : PDI<0xD1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), + "psrlw {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1, + (bc_v4i32 (loadv2i64 addr:$src2))))]>; def PSRLWri : PDIi8<0x71, MRM2r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "psrlw {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1, (scalar_to_vector (i32 imm:$src2))))]>; -def PSRLDrr : PDIi8<0xD2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - "psrld {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1, - VR128:$src2))]>; -def PSRLDrm : PDIi8<0xD2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), - "psrld {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1, - (bc_v4i32 (loadv2i64 addr:$src2))))]>; +def PSRLDrr : PDI<0xD2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psrld {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1, + VR128:$src2))]>; +def PSRLDrm : PDI<0xD2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), + "psrld {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1, + (bc_v4i32 (loadv2i64 addr:$src2))))]>; def PSRLDri : PDIi8<0x72, MRM2r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "psrld {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1, (scalar_to_vector (i32 imm:$src2))))]>; -def PSRLQrr : PDIi8<0xD3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - "psrlq {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1, - VR128:$src2))]>; -def PSRLQrm : PDIi8<0xD3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), - "psrlq {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1, - (bc_v4i32 (loadv2i64 addr:$src2))))]>; +def PSRLQrr : PDI<0xD3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psrlq {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1, + VR128:$src2))]>; +def PSRLQrm : PDI<0xD3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), + "psrlq {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1, + (bc_v4i32 (loadv2i64 addr:$src2))))]>; def PSRLQri : PDIi8<0x73, MRM2r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "psrlq {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1, @@ -1681,26 +1681,26 @@ def PSRLDQri : PDIi8<0x73, MRM3r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "psrldq {$src2, $dst|$dst, $src2}", []>; -def PSRAWrr : PDIi8<0xE1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - "psraw {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1, - VR128:$src2))]>; -def PSRAWrm : PDIi8<0xE1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), - "psraw {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1, - (bc_v4i32 (loadv2i64 addr:$src2))))]>; +def PSRAWrr : PDI<0xE1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psraw {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1, + VR128:$src2))]>; +def PSRAWrm : PDI<0xE1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), + "psraw {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1, + (bc_v4i32 (loadv2i64 addr:$src2))))]>; def PSRAWri : PDIi8<0x71, MRM4r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "psraw {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1, (scalar_to_vector (i32 imm:$src2))))]>; -def PSRADrr : PDIi8<0xE2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - "psrad {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1, - VR128:$src2))]>; -def PSRADrm : PDIi8<0xE2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), - "psrad {$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1, - (bc_v4i32 (loadv2i64 addr:$src2))))]>; +def PSRADrr : PDI<0xE2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psrad {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1, + VR128:$src2))]>; +def PSRADrm : PDI<0xE2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2), + "psrad {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1, + (bc_v4i32 (loadv2i64 addr:$src2))))]>; def PSRADri : PDIi8<0x72, MRM4r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2), "psrad {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1, _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits