Changes in directory llvm/lib/Target/X86:
X86AsmPrinter.cpp updated: 1.193 -> 1.194
X86Subtarget.h updated: 1.13 -> 1.14
X86Subtarget.cpp updated: 1.28 -> 1.29
---
Log message:
Make the x86 asm flavor part of the subtarget info.
---
Diffs of the changes: (+34 -24)
X86AsmPrinter.cpp | 29 ++++++-----------------------
X86Subtarget.cpp | 16 ++++++++++++++++
X86Subtarget.h | 13 ++++++++++++-
3 files changed, 34 insertions(+), 24 deletions(-)
Index: llvm/lib/Target/X86/X86AsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.193
llvm/lib/Target/X86/X86AsmPrinter.cpp:1.194
--- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.193 Wed Sep 6 13:34:40 2006
+++ llvm/lib/Target/X86/X86AsmPrinter.cpp Thu Sep 7 07:23:47 2006
@@ -23,28 +23,11 @@
#include "llvm/Type.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/Mangler.h"
-#include "llvm/Support/CommandLine.h"
using namespace llvm;
-enum AsmWriterFlavorTy { att, intel };
-
Statistic<> llvm::EmittedInsts("asm-printer",
"Number of machine instrs printed");
-cl::opt<AsmWriterFlavorTy>
-AsmWriterFlavor("x86-asm-syntax",
- cl::desc("Choose style of code to emit from X86 backend:"),
- cl::values(
- clEnumVal(att, " Emit AT&T-style assembly"),
- clEnumVal(intel, " Emit Intel-style assembly"),
- clEnumValEnd),
-#ifdef _MSC_VER
- cl::init(intel)
-#else
- cl::init(att)
-#endif
- );
-
X86TargetAsmInfo::X86TargetAsmInfo(X86TargetMachine &TM) {
const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>();
@@ -97,7 +80,7 @@
default: break;
}
- if (AsmWriterFlavor == intel) {
+ if (Subtarget->isFlavorIntel()) {
GlobalPrefix = "_";
CommentString = ";";
@@ -271,12 +254,12 @@
///
FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,
X86TargetMachine &tm) {
+ const X86Subtarget *Subtarget = &tm.getSubtarget<X86Subtarget>();
TargetAsmInfo *TAI = new X86TargetAsmInfo(tm);
- switch (AsmWriterFlavor) {
- default:
- assert(0 && "Unknown asm flavor!");
- case intel: return new X86IntelAsmPrinter(o, tm, TAI);
- case att: return new X86ATTAsmPrinter(o, tm, TAI);
+ if (Subtarget->isFlavorIntel()) {
+ return new X86IntelAsmPrinter(o, tm, TAI);
+ } else {
+ return new X86ATTAsmPrinter(o, tm, TAI);
}
}
Index: llvm/lib/Target/X86/X86Subtarget.h
diff -u llvm/lib/Target/X86/X86Subtarget.h:1.13
llvm/lib/Target/X86/X86Subtarget.h:1.14
--- llvm/lib/Target/X86/X86Subtarget.h:1.13 Sun Sep 3 23:08:58 2006
+++ llvm/lib/Target/X86/X86Subtarget.h Thu Sep 7 07:23:47 2006
@@ -22,6 +22,11 @@
class Module;
class X86Subtarget : public TargetSubtarget {
+public:
+ enum AsmWriterFlavorTy {
+ att, intel
+ };
+
protected:
enum X86SSEEnum {
NoMMXSSE, MMX, SSE1, SSE2, SSE3
@@ -31,12 +36,15 @@
NoThreeDNow, ThreeDNow, ThreeDNowA
};
+ /// AsmFlavor - Which x86 asm dialect to use.
+ AsmWriterFlavorTy AsmFlavor;
+
/// X86SSELevel - MMX, SSE1, SSE2, SSE3, or none supported.
X86SSEEnum X86SSELevel;
/// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
X863DNowEnum X863DNowLevel;
-
+
/// Is64Bit - True if the processor supports Em64T.
bool Is64Bit;
@@ -80,6 +88,9 @@
bool hasSSE3() const { return X86SSELevel >= SSE3; }
bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
+
+ bool isFlavorAtt() const { return AsmFlavor == att; }
+ bool isFlavorIntel() const { return AsmFlavor == intel; }
bool isTargetDarwin() const { return TargetType == isDarwin; }
bool isTargetELF() const { return TargetType == isELF; }
Index: llvm/lib/Target/X86/X86Subtarget.cpp
diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.28
llvm/lib/Target/X86/X86Subtarget.cpp:1.29
--- llvm/lib/Target/X86/X86Subtarget.cpp:1.28 Fri Jun 16 16:58:49 2006
+++ llvm/lib/Target/X86/X86Subtarget.cpp Thu Sep 7 07:23:47 2006
@@ -13,9 +13,24 @@
#include "X86Subtarget.h"
#include "llvm/Module.h"
+#include "llvm/Support/CommandLine.h"
#include "X86GenSubtarget.inc"
using namespace llvm;
+cl::opt<X86Subtarget::AsmWriterFlavorTy>
+AsmWriterFlavor("x86-asm-syntax",
+ cl::desc("Choose style of code to emit from X86 backend:"),
+ cl::values(
+ clEnumValN(X86Subtarget::att, "att", " Emit AT&T-style assembly"),
+ clEnumValN(X86Subtarget::intel, "intel", " Emit Intel-style assembly"),
+ clEnumValEnd),
+#ifdef _MSC_VER
+ cl::init(X86Subtarget::intel)
+#else
+ cl::init(X86Subtarget::att)
+#endif
+ );
+
/// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in
the
/// specified arguments. If we can't run cpuid on the host, return true.
static bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
@@ -151,6 +166,7 @@
MinRepStrSizeThreshold = 128;
X86SSELevel = NoMMXSSE;
X863DNowLevel = NoThreeDNow;
+ AsmFlavor = AsmWriterFlavor;
Is64Bit = false;
// Determine default and user specified characteristics
_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
