Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.75 -> 1.76 --- Log message: Completely eliminate def&use operands. Now a register operand is EITHER a def operand or a use operand. --- Diffs of the changes: (+3 -3) PPCRegisterInfo.cpp | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.75 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.76 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.75 Tue Aug 29 11:24:26 2006 +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Mon Sep 4 21:31:13 2006 @@ -421,7 +421,7 @@ int FrameIndex = MI.getOperand(i).getFrameIndex(); // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP). - MI.getOperand(i).ChangeToRegister(hasFP(MF) ? PPC::R31 : PPC::R1); + MI.getOperand(i).ChangeToRegister(hasFP(MF) ? PPC::R31 : PPC::R1, false); // Take into account whether it's an add or mem instruction unsigned OffIdx = (i == 2) ? 1 : 2; @@ -466,8 +466,8 @@ "No indexed form of load or store available!"); unsigned NewOpcode = ImmToIdxMap.find(MI.getOpcode())->second; MI.setOpcode(NewOpcode); - MI.getOperand(1).ChangeToRegister(MI.getOperand(i).getReg()); - MI.getOperand(2).ChangeToRegister(PPC::R0); + MI.getOperand(1).ChangeToRegister(MI.getOperand(i).getReg(), false); + MI.getOperand(2).ChangeToRegister(PPC::R0, false); } else { if (isIXAddr) { assert((Offset & 3) == 0 && "Invalid frame offset!"); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits