Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.190 -> 1.191 PPCBranchSelector.cpp updated: 1.25 -> 1.26 --- Log message: Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The asm printer will print it as offset*4. e.g. bne cr0, $+8. The PPC code emitter was expecting the offset to be number of instructions, not number of bytes. This fixes a whole bunch of JIT failures. --- Diffs of the changes: (+2 -2) PPCAsmPrinter.cpp | 2 +- PPCBranchSelector.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.190 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.191 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.190 Sat Aug 12 16:29:52 2006 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Fri Aug 25 16:54:44 2006 @@ -131,7 +131,7 @@ // Branches can take an immediate operand. This is used by the branch // selection pass to print $+8, an eight byte displacement from the PC. if (MI->getOperand(OpNo).isImmediate()) { - O << "$+" << MI->getOperand(OpNo).getImmedValue(); + O << "$+" << MI->getOperand(OpNo).getImmedValue()*4; } else { printOp(MI->getOperand(OpNo)); } Index: llvm/lib/Target/PowerPC/PPCBranchSelector.cpp diff -u llvm/lib/Target/PowerPC/PPCBranchSelector.cpp:1.25 llvm/lib/Target/PowerPC/PPCBranchSelector.cpp:1.26 --- llvm/lib/Target/PowerPC/PPCBranchSelector.cpp:1.25 Wed Jun 28 18:17:23 2006 +++ llvm/lib/Target/PowerPC/PPCBranchSelector.cpp Fri Aug 25 16:54:44 2006 @@ -133,7 +133,7 @@ if (Displacement >= -32768 && Displacement <= 32767) { BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB); } else { - BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(8); + BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(2); BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB); } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits