Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAGList.cpp updated: 1.64 -> 1.65
ScheduleDAGRRList.cpp updated: 1.11 -> 1.12
ScheduleDAGSimple.cpp updated: 1.15 -> 1.16
SelectionDAGISel.cpp updated: 1.265 -> 1.266
---
Log message:
Final polish on machine pass registries.
---
Diffs of the changes: (+22 -11)
ScheduleDAGList.cpp | 2 +-
ScheduleDAGRRList.cpp | 2 +-
ScheduleDAGSimple.cpp | 2 +-
SelectionDAGISel.cpp | 27 +++++++++++++++++++--------
4 files changed, 22 insertions(+), 11 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.64
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.65
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.64 Tue Aug 1
13:29:48 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Wed Aug 2 07:30:23 2006
@@ -19,8 +19,8 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "sched"
-#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.11
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.12
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.11 Tue Aug 1
13:29:48 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Wed Aug 2 07:30:23 2006
@@ -16,8 +16,8 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "sched"
-#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetData.h"
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.15
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.16
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.15 Tue Aug 1
13:29:48 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Wed Aug 2 07:30:23 2006
@@ -14,8 +14,8 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "sched"
-#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.265
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.266
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.265 Tue Aug 1
14:14:14 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Aug 2 07:30:23 2006
@@ -29,7 +29,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachinePassRegistry.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
@@ -40,7 +40,6 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
-#include "llvm/Support/CommandLine.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Visibility.h"
@@ -61,10 +60,24 @@
static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0;
#endif
+
+//===---------------------------------------------------------------------===//
+///
+/// RegisterScheduler class - Track the registration of instruction schedulers.
+///
+//===---------------------------------------------------------------------===//
+MachinePassRegistry RegisterScheduler::Registry;
+
+//===---------------------------------------------------------------------===//
+///
+/// ISHeuristic command line option for instruction schedulers.
+///
+//===---------------------------------------------------------------------===//
namespace {
- cl::opt<const char *, false, RegisterPassParser<RegisterScheduler> >
+ cl::opt<RegisterScheduler::FunctionPassCtor, false,
+ RegisterPassParser<RegisterScheduler> >
ISHeuristic("sched",
- cl::init("default"),
+ cl::init(createDefaultScheduler),
cl::desc("Instruction schedulers available:"));
static RegisterScheduler
@@ -3629,15 +3642,13 @@
void SelectionDAGISel::ScheduleAndEmitDAG(SelectionDAG &DAG) {
if (ViewSchedDAGs) DAG.viewGraph();
- static RegisterScheduler::FunctionPassCtor Ctor =
-
RegisterScheduler::getDefault();
+ RegisterScheduler::FunctionPassCtor Ctor = RegisterScheduler::getDefault();
if (!Ctor) {
- Ctor = RegisterScheduler::FindCtor(ISHeuristic);
+ Ctor = ISHeuristic;
RegisterScheduler::setDefault(Ctor);
}
- assert(Ctor && "No instruction scheduler found");
ScheduleDAG *SL = Ctor(this, &DAG, BB);
BB = SL->Run();
delete SL;
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