Changes in directory llvm/lib/CodeGen:
MachinePassRegistry.cpp updated: 1.1 -> 1.2 Passes.cpp updated: 1.19 -> 1.20 --- Log message: 1. Change use of "Cache" to "Default". 2. Added argument to instruction scheduler creators so the creators can do special things. 3. Repaired target hazard code. 4. Misc. More to follow. --- Diffs of the changes: (+8 -4) MachinePassRegistry.cpp | 8 ++++++-- Passes.cpp | 4 ++-- 2 files changed, 8 insertions(+), 4 deletions(-) Index: llvm/lib/CodeGen/MachinePassRegistry.cpp diff -u llvm/lib/CodeGen/MachinePassRegistry.cpp:1.1 llvm/lib/CodeGen/MachinePassRegistry.cpp:1.2 --- llvm/lib/CodeGen/MachinePassRegistry.cpp:1.1 Tue Aug 1 11:31:08 2006 +++ llvm/lib/CodeGen/MachinePassRegistry.cpp Tue Aug 1 13:29:48 2006 @@ -1,4 +1,4 @@ -//===-- MachineInstr.cpp --------------------------------------------------===// +//===-- CodeGen/MachineInstr.cpp ------------------------------------------===// // // The LLVM Compiler Infrastructure // @@ -6,9 +6,13 @@ // the University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// +// This file contains the machine function pass registry for register allocators +// and instruction schedulers. +// +//===----------------------------------------------------------------------===// #include "llvm/CodeGen/MachinePassRegistry.h" -#include <iostream> using namespace llvm; Index: llvm/lib/CodeGen/Passes.cpp diff -u llvm/lib/CodeGen/Passes.cpp:1.19 llvm/lib/CodeGen/Passes.cpp:1.20 --- llvm/lib/CodeGen/Passes.cpp:1.19 Tue Aug 1 09:21:23 2006 +++ llvm/lib/CodeGen/Passes.cpp Tue Aug 1 13:29:48 2006 @@ -27,13 +27,13 @@ } FunctionPass *llvm::createRegisterAllocator() { - RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getCache(); + RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getDefault(); if (!Ctor) { Ctor = RegisterRegAlloc::FindCtor(RegAlloc); assert(Ctor && "No register allocator found"); if (!Ctor) Ctor = RegisterRegAlloc::FirstCtor(); - RegisterRegAlloc::setCache(Ctor); + RegisterRegAlloc::setDefault(Ctor); } assert(Ctor && "No register allocator found"); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits