Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.8 -> 1.9 ARMISelDAGToDAG.cpp updated: 1.18 -> 1.19 --- Log message: implement LowerConstantPool and LowerGlobalAddress --- Diffs of the changes: (+26 -3) ARMAsmPrinter.cpp | 4 ++-- ARMISelDAGToDAG.cpp | 25 ++++++++++++++++++++++++- 2 files changed, 26 insertions(+), 3 deletions(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.8 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.9 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.8 Mon Jul 31 15:38:13 2006 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Aug 1 07:58:43 2006 @@ -168,8 +168,8 @@ abort(); break; case MachineOperand::MO_ConstantPoolIndex: - assert(0 && "not implemented"); - abort(); + O << PrivateGlobalPrefix << "CPI" << getFunctionNumber() + << '_' << MO.getConstantPoolIndex(); break; default: O << "<unknown operand type>"; abort (); break; Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.18 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.19 --- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.18 Thu Jul 27 19:46:15 2006 +++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Aug 1 07:58:43 2006 @@ -41,7 +41,9 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) : TargetLowering(TM) { - setOperationAction(ISD::RET, MVT::Other, Custom); + setOperationAction(ISD::RET, MVT::Other, Custom); + setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); + setOperationAction(ISD::ConstantPool, MVT::i32, Custom); } namespace llvm { @@ -218,6 +220,23 @@ } } +static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { + MVT::ValueType PtrVT = Op.getValueType(); + ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op); + Constant *C = CP->get(); + SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment()); + + return CPI; +} + +static SDOperand LowerGlobalAddress(SDOperand Op, + SelectionDAG &DAG) { + GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); + SDOperand CPAddr = DAG.getConstantPool(GV, MVT::i32, 2); + return DAG.getLoad(MVT::i32, DAG.getEntryNode(), CPAddr, + DAG.getSrcValue(NULL)); +} + static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) { std::vector<SDOperand> ArgValues; SDOperand Root = Op.getOperand(0); @@ -244,6 +263,10 @@ default: assert(0 && "Should not custom lower this!"); abort(); + case ISD::ConstantPool: + return LowerConstantPool(Op, DAG); + case ISD::GlobalAddress: + return LowerGlobalAddress(Op, DAG); case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); case ISD::CALL: _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits