Changes in directory llvm/lib/Target/X86:
X86InstrBuilder.h updated: 1.19 -> 1.20
X86RegisterInfo.cpp updated: 1.148 -> 1.149
---
Log message:
Remove and simplify some more machineinstr/machineoperand stuff.
---
Diffs of the changes: (+15 -15)
X86InstrBuilder.h | 12 ++++++------
X86RegisterInfo.cpp | 18 +++++++++---------
2 files changed, 15 insertions(+), 15 deletions(-)
Index: llvm/lib/Target/X86/X86InstrBuilder.h
diff -u llvm/lib/Target/X86/X86InstrBuilder.h:1.19
llvm/lib/Target/X86/X86InstrBuilder.h:1.20
--- llvm/lib/Target/X86/X86InstrBuilder.h:1.19 Thu May 4 12:21:20 2006
+++ llvm/lib/Target/X86/X86InstrBuilder.h Thu May 4 13:16:01 2006
@@ -61,7 +61,7 @@
unsigned Reg) {
// Because memory references are always represented with four
// values, this adds: Reg, [1, NoReg, 0] to the instruction.
- return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(0);
+ return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0);
}
@@ -71,14 +71,14 @@
///
inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
unsigned Reg, int Offset) {
- return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(Offset);
+ return MIB.addReg(Reg).addImm(1).addReg(0).addImm(Offset);
}
/// addRegReg - This function is used to add a memory reference of the form:
/// [Reg + Reg].
inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
unsigned Reg1, unsigned Reg2) {
- return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addImm(0);
+ return MIB.addReg(Reg1).addImm(1).addReg(Reg2).addImm(0);
}
inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder
&MIB,
@@ -91,7 +91,7 @@
MIB.addFrameIndex(AM.Base.FrameIndex);
else
assert (0);
- MIB.addZImm(AM.Scale).addReg(AM.IndexReg);
+ MIB.addImm(AM.Scale).addReg(AM.IndexReg);
if (AM.GV)
return MIB.addGlobalAddress(AM.GV, AM.Disp);
else
@@ -105,7 +105,7 @@
///
inline const MachineInstrBuilder &
addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
- return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addImm(Offset);
+ return MIB.addFrameIndex(FI).addImm(1).addReg(0).addImm(Offset);
}
/// addConstantPoolReference - This function is used to add a reference to the
@@ -117,7 +117,7 @@
inline const MachineInstrBuilder &
addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
int Offset = 0) {
- return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addImm(Offset);
+ return MIB.addConstantPoolIndex(CPI).addImm(1).addReg(0).addImm(Offset);
}
} // End llvm namespace
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.148
llvm/lib/Target/X86/X86RegisterInfo.cpp:1.149
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.148 Thu May 4 12:52:23 2006
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp Thu May 4 13:16:01 2006
@@ -139,14 +139,14 @@
MachineInstr *MI) {
return addFrameReference(BuildMI(Opcode, 6), FrameIndex)
.addReg(MI->getOperand(1).getReg())
- .addZImm(MI->getOperand(2).getImmedValue());
+ .addImm(MI->getOperand(2).getImmedValue());
}
static MachineInstr *MakeMIInst(unsigned Opcode, unsigned FrameIndex,
MachineInstr *MI) {
if (MI->getOperand(1).isImmediate())
return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
- .addZImm(MI->getOperand(1).getImmedValue());
+ .addImm(MI->getOperand(1).getImmedValue());
else if (MI->getOperand(1).isGlobalAddress())
return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
.addGlobalAddress(MI->getOperand(1).getGlobal(),
@@ -160,7 +160,7 @@
static MachineInstr *MakeM0Inst(unsigned Opcode, unsigned FrameIndex,
MachineInstr *MI) {
- return addFrameReference(BuildMI(Opcode, 5), FrameIndex).addZImm(0);
+ return addFrameReference(BuildMI(Opcode, 5), FrameIndex).addImm(0);
}
static MachineInstr *MakeRMInst(unsigned Opcode, unsigned FrameIndex,
@@ -174,7 +174,7 @@
MachineInstr *MI) {
const MachineOperand& op = MI->getOperand(0);
return addFrameReference(BuildMI(Opcode, 6, op.getReg(), op.getUseType()),
- FrameIndex).addZImm(MI->getOperand(2).getImmedValue());
+ FrameIndex).addImm(MI->getOperand(2).getImmedValue());
}
@@ -620,7 +620,7 @@
MachineInstr *New = 0;
if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
New=BuildMI(X86::SUB32ri, 1, X86::ESP, MachineOperand::UseAndDef)
- .addZImm(Amount);
+ .addImm(Amount);
} else {
assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
// factor out the amount the callee already popped.
@@ -629,7 +629,7 @@
if (Amount) {
unsigned Opc = Amount < 128 ? X86::ADD32ri8 : X86::ADD32ri;
New = BuildMI(Opc, 1, X86::ESP,
- MachineOperand::UseAndDef).addZImm(Amount);
+ MachineOperand::UseAndDef).addImm(Amount);
}
}
@@ -644,7 +644,7 @@
unsigned Opc = CalleeAmt < 128 ? X86::SUB32ri8 : X86::SUB32ri;
MachineInstr *New =
BuildMI(Opc, 1, X86::ESP,
- MachineOperand::UseAndDef).addZImm(CalleeAmt);
+ MachineOperand::UseAndDef).addImm(CalleeAmt);
MBB.insert(I, New);
}
}
@@ -793,11 +793,11 @@
if (NumBytes > 0) {
unsigned Opc = NumBytes < 128 ? X86::ADD32ri8 : X86::ADD32ri;
BuildMI(MBB, MBBI, Opc, 2)
- .addReg(X86::ESP, MachineOperand::UseAndDef).addZImm(NumBytes);
+ .addReg(X86::ESP, MachineOperand::UseAndDef).addImm(NumBytes);
} else if ((int)NumBytes < 0) {
unsigned Opc = -NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
BuildMI(MBB, MBBI, Opc, 2)
- .addReg(X86::ESP, MachineOperand::UseAndDef).addZImm(-NumBytes);
+ .addReg(X86::ESP, MachineOperand::UseAndDef).addImm(-NumBytes);
}
}
}
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