Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.175 -> 1.176
---
Log message:
remove hasAllocatedReg
---
Diffs of the changes: (+5 -18)
MachineInstr.h | 23 +++++------------------
1 files changed, 5 insertions(+), 18 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.175
llvm/include/llvm/CodeGen/MachineInstr.h:1.176
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.175 Thu May 4 12:52:22 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.h Thu May 4 12:56:20 2006
@@ -150,16 +150,11 @@
///
UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
- /// isRegister - Return true if this operand is a register operand.
- ///
- bool isRegister() const {
- return opType == MO_VirtualRegister;
- }
-
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
- bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
+ bool isRegister() const { return opType == MO_VirtualRegister; }
bool isImmediate() const { return opType == MO_Immediate; }
+ bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
bool isFrameIndex() const { return opType == MO_FrameIndex; }
bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
@@ -212,25 +207,17 @@
bool isDef () const { return flags & DEFFLAG; }
MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
- /// hasAllocatedReg - Returns true iff a machine register has been
- /// allocated to this operand.
- ///
- bool hasAllocatedReg() const {
- return extra.regNum >= 0 && opType == MO_VirtualRegister;
- }
-
- /// getReg - Returns the register number. It is a runtime error to call this
- /// if a register is not allocated.
+ /// getReg - Returns the register number.
///
unsigned getReg() const {
- assert(hasAllocatedReg());
+ assert(isRegister() && "This is not a register operand!");
return extra.regNum;
}
/// MachineOperand mutators.
///
void setReg(unsigned Reg) {
- assert(hasAllocatedReg() && "This operand cannot have a register number!");
+ assert(isRegister() && "This is not a register operand!");
extra.regNum = Reg;
}
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