Changes in directory llvm/test/Regression/CodeGen/X86:
2005-08-30-RegAllocAliasProblem.ll updated: 1.1 -> 1.2
2005-12-03-IndirectTailCall.ll updated: 1.2 -> 1.3
fast-cc-merge-stack-adj.ll updated: 1.3 -> 1.4
fast-cc-pass-in-regs.ll updated: 1.4 -> 1.5
overlap-add.ll updated: 1.3 -> 1.4
overlap-shift.ll updated: 1.4 -> 1.5
---
Log message:
Intel mode no longer uses %'s on registers
---
Diffs of the changes: (+7 -7)
2005-08-30-RegAllocAliasProblem.ll | 4 ++--
2005-12-03-IndirectTailCall.ll | 2 +-
fast-cc-merge-stack-adj.ll | 2 +-
fast-cc-pass-in-regs.ll | 2 +-
overlap-add.ll | 2 +-
overlap-shift.ll | 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
Index: llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll
diff -u llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll:1.1
llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll:1.2
--- llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll:1.1
Tue Aug 30 16:02:51 2005
+++ llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll Mon May
1 00:56:51 2006
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep
'test.*%AL' || \
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep
'cmove.*%EAX'
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep
'test.*AL' || \
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep
'cmove.*EAX'
; This testcase was compiling to:
;
Index: llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll
diff -u llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll:1.2
llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll:1.3
--- llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll:1.2 Fri Jan
27 15:13:27 2006
+++ llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll Mon May
1 00:56:51 2006
@@ -1,5 +1,5 @@
; XFAIL: *
-; RUN: llvm-as < %s | llc -march=x86 -enable-x86-fastcc | grep 'jmp \*%ecx'
+; RUN: llvm-as < %s | llc -march=x86 -enable-x86-fastcc | grep 'jmp \*ecx'
declare int %putchar(int)
int %main(){
Index: llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll
diff -u llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll:1.3
llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll:1.4
--- llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll:1.3 Wed Jul
20 14:12:00 2005
+++ llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll Mon May 1
00:56:51 2006
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc
| grep 'add %ESP, 8'
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc
| grep 'add ESP, 8'
target triple = "i686-pc-linux-gnu"
Index: llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll
diff -u llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll:1.4
llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll:1.5
--- llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll:1.4 Sat Mar
18 17:48:54 2006
+++ llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll Mon May 1
00:56:51 2006
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc
| grep 'mov %EDX, 1'
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc
| grep 'mov EDX, 1'
; check that fastcc is passing stuff in regs.
; Argument reg passing is disabled due to regalloc issues. FIXME!
Index: llvm/test/Regression/CodeGen/X86/overlap-add.ll
diff -u llvm/test/Regression/CodeGen/X86/overlap-add.ll:1.3
llvm/test/Regression/CodeGen/X86/overlap-add.ll:1.4
--- llvm/test/Regression/CodeGen/X86/overlap-add.ll:1.3 Fri Mar 24 01:13:29 2006
+++ llvm/test/Regression/CodeGen/X86/overlap-add.ll Mon May 1 00:56:51 2006
@@ -6,7 +6,7 @@
; Check that the shift gets turned into an LEA.
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov
%E.X, %E.X'
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov
E.X, E.X'
; FIXME: We need live variable information about flags to do this xform
safely. :(
; XFAIL: *
Index: llvm/test/Regression/CodeGen/X86/overlap-shift.ll
diff -u llvm/test/Regression/CodeGen/X86/overlap-shift.ll:1.4
llvm/test/Regression/CodeGen/X86/overlap-shift.ll:1.5
--- llvm/test/Regression/CodeGen/X86/overlap-shift.ll:1.4 Fri Mar 24
01:13:29 2006
+++ llvm/test/Regression/CodeGen/X86/overlap-shift.ll Mon May 1 00:56:51 2006
@@ -6,7 +6,7 @@
; Check that the shift gets turned into an LEA.
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov
%E.X, %E.X'
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov
E.X, E.X'
%G = external global int
_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
