Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.356 -> 1.357 SelectionDAG.cpp updated: 1.296 -> 1.297 SelectionDAGISel.cpp updated: 1.220 -> 1.221 --- Log message: Add code generator support for VSELECT --- Diffs of the changes: (+22 -10) LegalizeDAG.cpp | 5 +++++ SelectionDAG.cpp | 17 +++++++++-------- SelectionDAGISel.cpp | 10 ++++++++-- 3 files changed, 22 insertions(+), 10 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.356 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.357 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.356 Sat Apr 8 00:34:25 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Apr 8 17:22:57 2006 @@ -4773,6 +4773,11 @@ assert(0 && "Cast from unsupported vector type not implemented yet!"); } } + case ISD::VSELECT: + Result = DAG.getNode(ISD::SELECT, NewVT, Op.getOperand(0), + PackVectorOp(Op.getOperand(1), NewVT), + PackVectorOp(Op.getOperand(2), NewVT)); + break; } if (TLI.isTypeLegal(NewVT)) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.296 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.297 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.296 Mon Apr 3 20:02:22 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Apr 8 17:22:57 2006 @@ -2760,15 +2760,16 @@ case ISD::SETCC: return "setcc"; case ISD::SELECT: return "select"; case ISD::SELECT_CC: return "select_cc"; - case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; - case ISD::VINSERT_VECTOR_ELT: return "vinsert_vector_elt"; - case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; + case ISD::VSELECT: return "vselect"; + case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; + case ISD::VINSERT_VECTOR_ELT: return "vinsert_vector_elt"; + case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; case ISD::VEXTRACT_VECTOR_ELT: return "vextract_vector_elt"; - case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; - case ISD::VBUILD_VECTOR: return "vbuild_vector"; - case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; - case ISD::VVECTOR_SHUFFLE: return "vvector_shuffle"; - case ISD::VBIT_CONVERT: return "vbit_convert"; + case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; + case ISD::VBUILD_VECTOR: return "vbuild_vector"; + case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; + case ISD::VVECTOR_SHUFFLE: return "vvector_shuffle"; + case ISD::VBIT_CONVERT: return "vbit_convert"; case ISD::ADDC: return "addc"; case ISD::ADDE: return "adde"; case ISD::SUBC: return "subc"; Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.220 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.221 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.220 Fri Apr 7 23:15:24 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sat Apr 8 17:22:57 2006 @@ -992,8 +992,14 @@ SDOperand Cond = getValue(I.getOperand(0)); SDOperand TrueVal = getValue(I.getOperand(1)); SDOperand FalseVal = getValue(I.getOperand(2)); - setValue(&I, DAG.getNode(ISD::SELECT, TrueVal.getValueType(), Cond, - TrueVal, FalseVal)); + if (!isa<PackedType>(I.getType())) { + setValue(&I, DAG.getNode(ISD::SELECT, TrueVal.getValueType(), Cond, + TrueVal, FalseVal)); + } else { + setValue(&I, DAG.getNode(ISD::VSELECT, MVT::Vector, Cond, TrueVal, FalseVal, + *(TrueVal.Val->op_end()-2), + *(TrueVal.Val->op_end()-1))); + } } void SelectionDAGLowering::visitCast(User &I) { _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits