Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.192 -> 1.193 --- Log message: rename a method, to avoid confusion with llvm intrinsics. --- Diffs of the changes: (+3 -4) DAGISelEmitter.cpp | 7 +++---- 1 files changed, 3 insertions(+), 4 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.192 llvm/utils/TableGen/DAGISelEmitter.cpp:1.193 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.192 Thu Mar 30 23:25:56 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Thu Apr 6 15:19:52 2006 @@ -542,11 +542,11 @@ return FragTree; } -/// getIntrinsicType - Check to see if the specified record has an intrinsic +/// getImplicitType - Check to see if the specified record has an implicit /// type which should be applied to it. This infer the type of register /// references from the register file information, for example. /// -static std::vector<unsigned char> getIntrinsicType(Record *R, bool NotRegisters, +static std::vector<unsigned char> getImplicitType(Record *R, bool NotRegisters, TreePattern &TP) { // Some common return values std::vector<unsigned char> Unknown(1, MVT::isUnknown); @@ -598,8 +598,7 @@ if (isLeaf()) { if (DefInit *DI = dynamic_cast<DefInit*>(getLeafValue())) { // If it's a regclass or something else known, include the type. - return UpdateNodeType(getIntrinsicType(DI->getDef(), NotRegisters, TP), - TP); + return UpdateNodeType(getImplicitType(DI->getDef(), NotRegisters, TP),TP); } else if (IntInit *II = dynamic_cast<IntInit*>(getLeafValue())) { // Int inits are always integers. :) bool MadeChange = UpdateNodeType(MVT::isInt, TP); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits