Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.48 -> 1.49
---
Log message:
Implement TargetLowering::getPackedTypeBreakdown
---
Diffs of the changes: (+41 -0)
TargetLowering.cpp | 41 +++++++++++++++++++++++++++++++++++++++++
1 files changed, 41 insertions(+)
Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.48
llvm/lib/Target/TargetLowering.cpp:1.49
--- llvm/lib/Target/TargetLowering.cpp:1.48 Thu Mar 23 17:24:51 2006
+++ llvm/lib/Target/TargetLowering.cpp Thu Mar 30 18:28:56 2006
@@ -14,6 +14,7 @@
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/DerivedTypes.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/MathExtras.h"
@@ -141,6 +142,46 @@
return NULL;
}
+/// getPackedTypeBreakdown - Packed types are broken down into some number of
+/// legal scalar types. For example, <8 x float> maps to 2 MVT::v2f32 values
+/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack.
+///
+/// This method returns the number and type of the resultant breakdown.
+///
+MVT::ValueType TargetLowering::getPackedTypeBreakdown(const PackedType *PTy,
+ unsigned &NumVals) const
{
+ // Figure out the right, legal destination reg to copy into.
+ unsigned NumElts = PTy->getNumElements();
+ MVT::ValueType EltTy = getValueType(PTy->getElementType());
+
+ unsigned NumVectorRegs = 1;
+
+ // Divide the input until we get to a supported size. This will always
+ // end with a scalar if the target doesn't support vectors.
+ while (NumElts > 1 && !isTypeLegal(getVectorType(EltTy, NumElts))) {
+ NumElts >>= 1;
+ NumVectorRegs <<= 1;
+ }
+
+ MVT::ValueType VT;
+ if (NumElts == 1)
+ VT = EltTy;
+ else
+ VT = getVectorType(EltTy, NumElts);
+
+ MVT::ValueType DestVT = getTypeToTransformTo(VT);
+ if (DestVT < VT) {
+ // Value is expanded, e.g. i64 -> i16.
+ NumVals =
NumVectorRegs*(MVT::getSizeInBits(VT)/MVT::getSizeInBits(DestVT));
+ } else {
+ // Otherwise, promotion or legal types use the same number of registers as
+ // the vector decimated to the appropriate level.
+ NumVals = NumVectorRegs;
+ }
+
+ return DestVT;
+}
+
//===----------------------------------------------------------------------===//
// Optimization Methods
//===----------------------------------------------------------------------===//
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