[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrFormats.td PPCInstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPCInstrFormats.td updated: 1.66 -> 1.67
PPCInstrInfo.td updated: 1.201 -> 1.202
---
Log message:

Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp


---
Diffs of the changes:  (+8 -9)

 PPCInstrFormats.td |    2 +-
 PPCInstrInfo.td    |   15 +++++++--------
 2 files changed, 8 insertions(+), 9 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrFormats.td
diff -u llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.66 
llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.67
--- llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.66     Sun Mar 12 23:15:10 2006
+++ llvm/lib/Target/PowerPC/PPCInstrFormats.td  Tue Mar 21 19:44:36 2006
@@ -595,8 +595,8 @@
     : I<4, OL, asmstr, itin> {
   bits<5> VD;
   bits<5> VA;
-  bits<5> VB;
   bits<5> VC;
+  bits<5> VB;
 
   let Pattern = pattern;
   


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.201 
llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.202
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.201       Mon Mar 20 18:51:38 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td     Tue Mar 21 19:44:36 2006
@@ -948,22 +948,21 @@
 
 let PPC970_Unit = 5 in {  // VALU Operations.
 // VA-Form instructions.  3-input AltiVec ops.
-def VMADDFP : VAForm_1<46, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
+def VMADDFP : VAForm_1<46, (ops VRRC:$vD, VRRC:$vA, VRRC:$vC, VRRC:$vB),
                        "vmaddfp $vD, $vA, $vC, $vB", VecFP,
                        [(set VRRC:$vD, (fadd (fmul VRRC:$vA, VRRC:$vC),
                                              VRRC:$vB))]>,
                        Requires<[FPContractions]>;
-def VNMSUBFP: VAForm_1<47, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
+def VNMSUBFP: VAForm_1<47, (ops VRRC:$vD, VRRC:$vA, VRRC:$vC, VRRC:$vB),
                        "vnmsubfp $vD, $vA, $vC, $vB", VecFP,
-                       [(set VRRC:$vD, (fneg (fsub (fmul VRRC:$vA, 
-                                                         VRRC:$vC),
-                                                  VRRC:$vB)))]>,
+                       [(set VRRC:$vD, (fneg (fsub (fmul VRRC:$vA, VRRC:$vC),
+                                                   VRRC:$vB)))]>,
                        Requires<[FPContractions]>;
 
-def VPERM   : VAForm_1<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
-                       "vperm $vD, $vA, $vB, $vC", VecPerm,
+def VPERM   : VAForm_1<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vC, VRRC:$vB),
+                       "vperm $vD, $vA, $vC, $vB", VecPerm,
                        [(set VRRC:$vD,
-                             (PPCvperm (v4f32 VRRC:$vA), VRRC:$vB, 
VRRC:$vC))]>;
+                             (PPCvperm (v4f32 VRRC:$vA), VRRC:$vC, 
VRRC:$vB))]>;
 
 
 // VX-Form instructions.  AltiVec arithmetic ops.



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