Changes in directory llvm/lib/Target/PowerPC:
PPC.h updated: 1.27 -> 1.28
PPCAsmPrinter.cpp updated: 1.157 -> 1.158
PPCISelDAGToDAG.cpp updated: 1.165 -> 1.166
PPCISelLowering.cpp updated: 1.95 -> 1.96
PPCISelLowering.h updated: 1.25 -> 1.26
PPCJITInfo.h updated: 1.8 -> 1.9
PPCTargetMachine.cpp updated: 1.81 -> 1.82
PPCTargetMachine.h updated: 1.16 -> 1.17
---
Log message:
Added getTargetLowering() to TargetMachine. Refactored targets to support this.
---
Diffs of the changes: (+30 -13)
PPC.h | 8 ++++----
PPCAsmPrinter.cpp | 5 +++--
PPCISelDAGToDAG.cpp | 7 ++++---
PPCISelLowering.cpp | 8 ++++++++
PPCISelLowering.h | 4 ++++
PPCJITInfo.h | 6 +++---
PPCTargetMachine.cpp | 2 +-
PPCTargetMachine.h | 3 +++
8 files changed, 30 insertions(+), 13 deletions(-)
Index: llvm/lib/Target/PowerPC/PPC.h
diff -u llvm/lib/Target/PowerPC/PPC.h:1.27 llvm/lib/Target/PowerPC/PPC.h:1.28
--- llvm/lib/Target/PowerPC/PPC.h:1.27 Wed Feb 22 14:19:42 2006
+++ llvm/lib/Target/PowerPC/PPC.h Mon Mar 13 17:20:37 2006
@@ -20,16 +20,16 @@
namespace llvm {
class FunctionPass;
-class TargetMachine;
+class PPCTargetMachine;
enum PPCTargetEnum {
TargetDefault, TargetAIX, TargetDarwin
};
FunctionPass *createPPCBranchSelectionPass();
-FunctionPass *createPPCISelDag(TargetMachine &TM);
-FunctionPass *createDarwinAsmPrinter(std::ostream &OS, TargetMachine &TM);
-FunctionPass *createAIXAsmPrinter(std::ostream &OS, TargetMachine &TM);
+FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
+FunctionPass *createDarwinAsmPrinter(std::ostream &OS, PPCTargetMachine &TM);
+FunctionPass *createAIXAsmPrinter(std::ostream &OS, PPCTargetMachine &TM);
extern PPCTargetEnum PPCTarget;
} // end namespace llvm;
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.157
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.158
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.157 Tue Mar 7 16:00:35 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Mon Mar 13 17:20:37 2006
@@ -307,7 +307,8 @@
/// code for a MachineFunction to the given output stream, in a format that the
/// Darwin assembler can deal with.
///
-FunctionPass *llvm::createDarwinAsmPrinter(std::ostream &o, TargetMachine &tm)
{
+FunctionPass *llvm::createDarwinAsmPrinter(std::ostream &o,
+ PPCTargetMachine &tm) {
return new DarwinAsmPrinter(o, tm);
}
@@ -315,7 +316,7 @@
/// for a MachineFunction to the given output stream, in a format that the
/// AIX 5L assembler can deal with.
///
-FunctionPass *llvm::createAIXAsmPrinter(std::ostream &o, TargetMachine &tm) {
+FunctionPass *llvm::createAIXAsmPrinter(std::ostream &o, PPCTargetMachine &tm)
{
return new AIXAsmPrinter(o, tm);
}
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.165
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.166
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.165 Mon Mar 13 15:52:10 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Mon Mar 13 17:20:37 2006
@@ -42,8 +42,9 @@
PPCTargetLowering PPCLowering;
unsigned GlobalBaseReg;
public:
- PPCDAGToDAGISel(TargetMachine &TM)
- : SelectionDAGISel(PPCLowering), PPCLowering(TM) {}
+ PPCDAGToDAGISel(PPCTargetMachine &TM)
+ : SelectionDAGISel(PPCLowering),
+ PPCLowering(*TM.getTargetLowering()){}
virtual bool runOnFunction(Function &Fn) {
// Make sure we re-emit a set of the global base reg if necessary
@@ -1140,7 +1141,7 @@
/// createPPCISelDag - This pass converts a legalized DAG into a
/// PowerPC-specific DAG, ready for instruction scheduling.
///
-FunctionPass *llvm::createPPCISelDag(TargetMachine &TM) {
+FunctionPass *llvm::createPPCISelDag(PPCTargetMachine &TM) {
return new PPCDAGToDAGISel(TM);
}
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.95
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.96
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.95 Sat Mar 4 23:08:37 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Mon Mar 13 17:20:37 2006
@@ -14,6 +14,7 @@
#include "PPCISelLowering.h"
#include "PPCTargetMachine.h"
#include "llvm/ADT/VectorExtras.h"
+#include "llvm/Analysis/ScalarEvolutionExpressions.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -1174,3 +1175,10 @@
// Handle standard constraint letters.
return TargetLowering::isOperandValidForConstraint(Op, Letter);
}
+
+/// isLegalAddressImmediate - Return true if the integer value can be used
+/// as the offset of the target addressing mode.
+bool PPCTargetLowering::isLegalAddressImmediate(int64_t V) const {
+ // PPC allows a sign-extended 16-bit immediate field.
+ return (V > -(1 << 16) && V < (1 << 16)-1);
+}
Index: llvm/lib/Target/PowerPC/PPCISelLowering.h
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.25
llvm/lib/Target/PowerPC/PPCISelLowering.h:1.26
--- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.25 Tue Feb 28 23:50:56 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.h Mon Mar 13 17:20:37 2006
@@ -109,6 +109,10 @@
getRegClassForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const;
bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter);
+
+ /// isLegalAddressImmediate - Return true if the integer value can be used
+ /// as the offset of the target addressing mode.
+ virtual bool isLegalAddressImmediate(int64_t V) const;
};
}
Index: llvm/lib/Target/PowerPC/PPCJITInfo.h
diff -u llvm/lib/Target/PowerPC/PPCJITInfo.h:1.8
llvm/lib/Target/PowerPC/PPCJITInfo.h:1.9
--- llvm/lib/Target/PowerPC/PPCJITInfo.h:1.8 Sun Oct 16 00:39:50 2005
+++ llvm/lib/Target/PowerPC/PPCJITInfo.h Mon Mar 13 17:20:37 2006
@@ -17,13 +17,13 @@
#include "llvm/Target/TargetJITInfo.h"
namespace llvm {
- class TargetMachine;
+ class PPCTargetMachine;
class PPCJITInfo : public TargetJITInfo {
protected:
- TargetMachine &TM;
+ PPCTargetMachine &TM;
public:
- PPCJITInfo(TargetMachine &tm) : TM(tm) {useGOT = 0;}
+ PPCJITInfo(PPCTargetMachine &tm) : TM(tm) {useGOT = 0;}
/// addPassesToJITCompile - Add passes to the specified pass manager to
/// implement a fast dynamic compiler for this target. Return true if this
Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.81
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.82
--- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.81 Thu Feb 23 16:18:07 2006
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.cpp Mon Mar 13 17:20:37 2006
@@ -62,7 +62,7 @@
const std::string &FS)
: TargetMachine("PowerPC", IL, false, 4, 4, 4, 4, 4, 4, 2, 1, 1),
Subtarget(M, FS), FrameInfo(*this, false), JITInfo(*this),
- InstrItins(Subtarget.getInstrItineraryData()) {
+ TLInfo(*this), InstrItins(Subtarget.getInstrItineraryData()) {
if (TargetDefault == PPCTarget) {
if (Subtarget.isAIX()) PPCTarget = TargetAIX;
if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
Index: llvm/lib/Target/PowerPC/PPCTargetMachine.h
diff -u llvm/lib/Target/PowerPC/PPCTargetMachine.h:1.16
llvm/lib/Target/PowerPC/PPCTargetMachine.h:1.17
--- llvm/lib/Target/PowerPC/PPCTargetMachine.h:1.16 Mon Nov 7 20:12:47 2005
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.h Mon Mar 13 17:20:37 2006
@@ -18,6 +18,7 @@
#include "PPCSubtarget.h"
#include "PPCJITInfo.h"
#include "PPCInstrInfo.h"
+#include "PPCISelLowering.h"
#include "llvm/Target/TargetMachine.h"
namespace llvm {
@@ -31,6 +32,7 @@
PPCSubtarget Subtarget;
PPCFrameInfo FrameInfo;
PPCJITInfo JITInfo;
+ PPCTargetLowering TLInfo;
InstrItineraryData InstrItins;
public:
PPCTargetMachine(const Module &M, IntrinsicLowering *IL,
@@ -40,6 +42,7 @@
virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
virtual TargetJITInfo *getJITInfo() { return &JITInfo; }
virtual const TargetSubtarget *getSubtargetImpl() const{ return &Subtarget;
}
+ virtual PPCTargetLowering *getTargetLowering() { return &TLInfo; }
virtual const MRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
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