Changes in directory llvm/lib/Target/Sparc:
SparcInstrInfo.td updated: 1.122 -> 1.123 --- Log message: The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter instructions are expensive. --- Diffs of the changes: (+2 -3) SparcInstrInfo.td | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) Index: llvm/lib/Target/Sparc/SparcInstrInfo.td diff -u llvm/lib/Target/Sparc/SparcInstrInfo.td:1.122 llvm/lib/Target/Sparc/SparcInstrInfo.td:1.123 --- llvm/lib/Target/Sparc/SparcInstrInfo.td:1.122 Thu Feb 16 23:43:56 2006 +++ llvm/lib/Target/Sparc/SparcInstrInfo.td Tue Feb 21 12:04:32 2006 @@ -191,7 +191,7 @@ // FpMOVD/FpNEGD/FpABSD - These are lowered to single-precision ops by the // fpmover pass. -let Predicates = [HasNoV9] in { // Only emit these in SP mode. +let Predicates = [HasNoV9] in { // Only emit these in V8 mode. def FpMOVD : Pseudo<(ops DFPRegs:$dst, DFPRegs:$src), "!FpMOVD $src, $dst", []>; def FpNEGD : Pseudo<(ops DFPRegs:$dst, DFPRegs:$src), @@ -205,8 +205,7 @@ // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded by the // scheduler into a branch sequence. This has to handle all permutations of // selection between i32/f32/f64 on ICC and FCC. -let usesCustomDAGSchedInserter = 1, // Expanded by the scheduler. - Predicates = [HasNoV9] in { // V9 has conditional moves +let usesCustomDAGSchedInserter = 1 in { // Expanded by the scheduler. def SELECT_CC_Int_ICC : Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F, i32imm:$Cond), "; SELECT_CC_Int_ICC PSEUDO!", _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits