Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.240 -> 1.241 --- Log message: Added MMX and XMM packed integer move instructions, movd and movq. --- Diffs of the changes: (+46 -0) X86InstrInfo.td | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 46 insertions(+) Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.240 llvm/lib/Target/X86/X86InstrInfo.td:1.241 --- llvm/lib/Target/X86/X86InstrInfo.td:1.240 Mon Feb 20 16:34:53 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Mon Feb 20 19:39:57 2006 @@ -3023,6 +3023,52 @@ //===----------------------------------------------------------------------===// +// MMX and XMM Packed Integer support (requires MMX, SSE, and SSE2) +//===----------------------------------------------------------------------===// + +// Move Instructions +def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, R32:$src), + "movd {$src, $dst|$dst, $src}", []>, TB, + Requires<[HasSSE1]>; +def MOVD64rm : I<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src), + "movd {$src, $dst|$dst, $src}", []>, TB, + Requires<[HasSSE1]>; +def MOVD64mr : I<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src), + "movd {$src, $dst|$dst, $src}", []>, TB, + Requires<[HasSSE1]>; + +def MOVD128rr : I<0x6E, MRMSrcReg, (ops VR128:$dst, R32:$src), + "movd {$src, $dst|$dst, $src}", []>, TB, OpSize, + Requires<[HasSSE2]>; +def MOVD128rm : I<0x6E, MRMSrcMem, (ops VR128:$dst, i32mem:$src), + "movd {$src, $dst|$dst, $src}", []>, TB, OpSize, + Requires<[HasSSE2]>; +def MOVD128mr : I<0x7E, MRMDestMem, (ops i32mem:$dst, VR128:$src), + "movd {$src, $dst|$dst, $src}", []>, TB, OpSize, + Requires<[HasSSE2]>; + + +def MOVQ64rr : I<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src), + "movq {$src, $dst|$dst, $src}", []>, TB, + Requires<[HasSSE1]>; +def MOVQ64rm : I<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src), + "movq {$src, $dst|$dst, $src}", []>, TB, + Requires<[HasSSE1]>; +def MOVQ64mr : I<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src), + "movq {$src, $dst|$dst, $src}", []>, TB, + Requires<[HasSSE1]>; + +def MOVQ128rr : I<0x7E, MRMSrcReg, (ops VR128:$dst, VR64:$src), + "movq {$src, $dst|$dst, $src}", []>, XS, + Requires<[HasSSE2]>; +def MOVQ128rm : I<0x7E, MRMSrcMem, (ops VR128:$dst, i64mem:$src), + "movq {$src, $dst|$dst, $src}", []>, XS, + Requires<[HasSSE2]>; +def MOVQ128mr : I<0xD6, MRMSrcMem, (ops i64mem:$dst, VR128:$src), + "movq {$src, $dst|$dst, $src}", []>, TB, OpSize, + Requires<[HasSSE2]>; + +//===----------------------------------------------------------------------===// // XMM Packed Floating point support (requires SSE / SSE2) //===----------------------------------------------------------------------===// _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits