Changes in directory llvm/lib/Target/X86:
X86FloatingPoint.cpp updated: 1.49 -> 1.50 X86InstrInfo.td updated: 1.238 -> 1.239 --- Log message: Added fisttp for fp to int conversion. --- Diffs of the changes: (+29 -3) X86FloatingPoint.cpp | 17 ++++++++++++++--- X86InstrInfo.td | 15 +++++++++++++++ 2 files changed, 29 insertions(+), 3 deletions(-) Index: llvm/lib/Target/X86/X86FloatingPoint.cpp diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.49 llvm/lib/Target/X86/X86FloatingPoint.cpp:1.50 --- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.49 Thu Jan 26 14:41:32 2006 +++ llvm/lib/Target/X86/X86FloatingPoint.cpp Fri Feb 17 20:36:28 2006 @@ -357,6 +357,9 @@ { X86::FpIST16m , X86::FIST16m }, { X86::FpIST32m , X86::FIST32m }, { X86::FpIST64m , X86::FISTP64m }, + { X86::FpISTT16m , X86::FISTTP16m}, + { X86::FpISTT32m , X86::FISTTP32m}, + { X86::FpISTT64m , X86::FISTTP64m}, { X86::FpISUB16m , X86::FISUB16m }, { X86::FpISUB32m , X86::FISUB32m }, { X86::FpISUBR16m, X86::FISUBR16m}, @@ -502,12 +505,17 @@ unsigned Reg = getFPReg(MI->getOperand(MI->getNumOperands()-1)); bool KillsSrc = LV->KillsRegister(MI, X86::FP0+Reg); - // FISTP64r is strange because there isn't a non-popping versions. + // FISTP64m is strange because there isn't a non-popping versions. // If we have one _and_ we don't want to pop the operand, duplicate the value // on the stack instead of moving it. This ensure that popping the value is // always ok. + // Ditto FISTTP16m, FISTTP32m, FISTTP64m. // - if (MI->getOpcode() == X86::FpIST64m && !KillsSrc) { + if (!KillsSrc && + (MI->getOpcode() == X86::FpIST64m || + MI->getOpcode() == X86::FpISTT16m || + MI->getOpcode() == X86::FpISTT32m || + MI->getOpcode() == X86::FpISTT64m)) { duplicateToTop(Reg, 7 /*temp register*/, I); } else { moveToTop(Reg, I); // Move to the top of the stack... @@ -517,7 +525,10 @@ MI->RemoveOperand(MI->getNumOperands()-1); // Remove explicit ST(0) operand MI->setOpcode(getConcreteOpcode(MI->getOpcode())); - if (MI->getOpcode() == X86::FISTP64m) { + if (MI->getOpcode() == X86::FISTP64m || + MI->getOpcode() == X86::FISTTP16m || + MI->getOpcode() == X86::FISTTP32m || + MI->getOpcode() == X86::FISTTP64m) { assert(StackTop > 0 && "Stack empty??"); --StackTop; } else if (KillsSrc) { // Last use of operand? Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.238 llvm/lib/Target/X86/X86InstrInfo.td:1.239 --- llvm/lib/Target/X86/X86InstrInfo.td:1.238 Fri Feb 17 18:15:05 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Fri Feb 17 20:36:28 2006 @@ -2957,6 +2957,21 @@ def FISTP32m : FPI<0xDB, MRM3m, (ops i32mem:$dst), "fistp{l} $dst">; def FISTP64m : FPI<0xDF, MRM7m, (ops i64mem:$dst), "fistp{ll} $dst">; +// FISTTP requires SSE3 even though it's a FPStack op. +def FpISTT16m : FpI_<(ops i16mem:$op, RFP:$src), OneArgFP, + [(X86fp_to_i16mem RFP:$src, addr:$op)]>, + Requires<[HasSSE3]>; +def FpISTT32m : FpI_<(ops i32mem:$op, RFP:$src), OneArgFP, + [(X86fp_to_i32mem RFP:$src, addr:$op)]>, + Requires<[HasSSE3]>; +def FpISTT64m : FpI_<(ops i64mem:$op, RFP:$src), OneArgFP, + [(X86fp_to_i64mem RFP:$src, addr:$op)]>, + Requires<[HasSSE3]>; + +def FISTTP16m : FPI<0xDF, MRM1m, (ops i16mem:$dst), "fisttp{s} $dst">; +def FISTTP32m : FPI<0xDB, MRM1m, (ops i32mem:$dst), "fisttp{l} $dst">; +def FISTTP64m : FPI<0xDD, MRM1m, (ops i64mem:$dst), "fisttp{ll} $dst">; + // FP Stack manipulation instructions. def FLDrr : FPI<0xC0, AddRegFrm, (ops RST:$op), "fld $op">, D9; def FSTrr : FPI<0xD0, AddRegFrm, (ops RST:$op), "fst $op">, DD; _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits