Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.121 -> 1.122 --- Log message: Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg transfer. According to the Intel P4 Optimization Manual: Moves that write a portion of a register can introduce unwanted dependences. The movsd reg, reg instruction writes only the bottom 64 bits of a register, not to all 128 bits. This introduces a dependence on the preceding instruction that produces the upper 64 bits (even if those bits are not longer wanted). The dependence inhibits register renaming, and thereby reduces parallelism. Not to mention movaps is shorter than movss. --- Diffs of the changes: (+2 -2) X86RegisterInfo.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86RegisterInfo.cpp diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.121 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.122 --- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.121 Fri Feb 3 12:20:04 2006 +++ llvm/lib/Target/X86/X86RegisterInfo.cpp Wed Feb 15 19:50:02 2006 @@ -106,9 +106,9 @@ } else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) { Opc = X86::FpMOV; } else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) { - Opc = X86::MOVSSrr; + Opc = X86::MOVAPSrr; } else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) { - Opc = X86::MOVSDrr; + Opc = X86::MOVAPDrr; } else { assert(0 && "Unknown regclass"); abort(); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits